DCAN Control Registers
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SPNU563A–March 2018
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Controller Area Network (DCAN) Module
27.17.21 Message Valid Registers (DCAN MSGVAL12 to DCAN MSGVAL78)
These registers hold the MsgVal bits of the implemented message objects. By reading out these bits, the
CPU can check which message objects are valid. The MsgVal bit of a specific message object can be
set/reset by the CPU via the IF1/IF2 Interface Register sets, or by the Message Handler after a reception
or a successful transmission.
Figure 27-49. Message Valid 12 Register (DCAN MSGVAL12) [offset = C4h]
31 0
MsgVal[32:1]
R-0
LEGEND: R = Read only; -n = value after reset
Figure 27-50. Message Valid 34 Register (DCAN MSGVAL34) [offset = C8h]
31 0
MsgVal[64:33]
R-0
LEGEND: R = Read only; -n = value after reset
Figure 27-51. Message Valid 56 Register (DCAN MSGVAL56) [offset = CCh]
31 0
MsgVal[96:65]
R-0
LEGEND: R = Read only; -n = value after reset
Figure 27-52. Message Valid 78 Register (DCAN MSGVAL78) [offset = D0h]
31 0
MsgVal[128:97]
R-0
LEGEND: R = Read only; -n = value after reset
Table 27-23. Message Valid Registers Field Descriptions
Bit Name Value Description
31-0 MsgVal[128:1] Message Valid Bits (for all message objects).
0 This message object is ignored by the Message Handler.
1 This message object is configured and will be considered by the Message Handler.
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