Texas Instruments TMS570LC4357

PBIST Control Registers www.ti.com
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SPNU563A–March 2018
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Programmable Built-In Self-Test (PBIST) Module
9.5.10 ROM Mask Register (ROM)
This two-bit register sets appropriate ROM access modes for the PBIST controller. The default value is
11b. This register is illustrated in Figure 9-15. It can be programmed according to Table 9-14.
Figure 9-15. ROM Mask Register (ROM) [offset = 01C0h]
31 16
Reserved
R-0
15 2 1 0
Reserved ROM
R-0 R/W-3h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9-14. ROM Mask Register (ROM) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reads return 0. Writes have no effect.
1-0 ROM ROM Mask
0 No information is used from ROM.
1h Only RAM Group information from ROM.
2h Only Algorithm information from ROM.
3h Both Algorithm and RAM Group information from ROM. This option should be selected for application
self-test.