N2HET Control Registers
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SPNU563A–March 2018
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High-End Timer (N2HET) Module
Table 23-20. Interrupt Offset Encoding Format
Offset Value Source No.
0 No interrupt
1 Instruction 0, 32, 64...
2 Instruction 1, 33, 65...
: :
32 Instruction 31, 63, 95...
33 Program Overflow
34 APCNT Underflow
35 APCNT Overflow
23.4.5 Offset Index Priority Level 2 Register (HETOFF2)
N2HET1: offset = FFF7 B810h; N2HET2: offset = FFF7 B910h
Figure 23-60. Offset Index Priority Level 2 Register (HETOFF2)
31 16
Reserved
R-0
15 6 5 0
Reserved OFFSET2
R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 23-21. Offset Index Priority Level 2 Register (HETOFF2) Field Descriptions
Bit Field Value Description
31-6 Reserved 0 Reads return 0. Writes have no effect.
5-0 OFFSET2 OFFSET2 indexes the currently pending low-priority interrupt. Offset values and sources are listed in
Table 23-20.
Read: Read of these bits determines the pending N2HET interrupt.
Write: Writes have no effect.
Note: In any read operation mode, the corresponding flag (in the HETFLG) is also cleared. In Emulation
mode, the corresponding flag is not cleared.
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