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Texas Instruments TMS570LC4357 User Manual

Texas Instruments TMS570LC4357
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Module Operation
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SPNU563AMarch 2018
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Copyright © 2018, Texas Instruments Incorporated
FlexRay Module
3. ECC single-bit error during scan of header sections in message RAM
SBESTAT.SMR bit is set
SBESTAT.FMBD bit is set to indicate that SBESTAT.FMB(6-0) points to a faulty message buffer
SBESTAT.FMB(6-0) indicates the number of the faulty message buffer
If ECC single-bit error correction is disabled:
Ignore message buffer (the transfer of the message buffer is skipped)
4. ECC single-bit error during data transfer from message RAM to transient buffer RAM 1,2
SBESTAT.SMR bit is set
SBESTAT.FMBD bit is set to indicate that SBESTAT.FMB(6-0) points to the faulty message buffer
SBESTAT.FMB(6-0) indicates the number of the faulty message buffer
If ECC single-bit error correction is disabled:
Frame not transmitted, frames already in transmission are invalidated by clearing the frame
CRC to 0
5. ECC single-bit error during data transfer from transient buffer RAM 1,2 to protocol controller 1, 2
SBESTAT.STBF1,2 bit is set
If ECC single-bit error correction is disabled:
Frames already in transmission are invalidated by setting the frame CRC to 0
6. ECC single-bit error during data transfer from transient buffer RAM 1,2 to message RAM
a. ECC single-bit error when reading header section of corresponding message buffer from message
RAM
SBESTAT.SMR bit is set
SBESTAT.FMBD bit is set to indicate that SBESTAT.FMB(6-0) points to a faulty message
buffer
SBESTAT.FMB(6-0) indicates the number of the faulty message buffer
If ECC single-bit error correction is disabled:
The data section of the corresponding message buffer is not updated
b. ECC single-bit error when reading transient buffer RAM 1,2:
SBESTAT.STBF1,2 bit is set
SBESTAT.FMBD bit is set to indicate that SBESTAT.FMB(6-0) points to a faulty message
buffer
SBESTAT.FMB(6-0) indicates the number of the faulty message buffer
The data section of the corresponding message buffer is updated
7. ECC single-bit error during data transfer from message RAM to output buffer RAM
SBESTAT.SMR bit is set
SBESTAT.FMBD bit is set to indicate that SBESTAT.FMB(6-0) points to faulty message buffer
SBESTAT.FMB(6-0) indicates the number of the faulty message buffer
If ECC single-bit error correction is disabled:
Header and/or data section of the output buffer is updated, but should not be used by the host
CPU
8. ECC single-bit error during host CPU reading output buffer RAM 1,2
SBESTAT.SOBF bit is set
9. ECC single-bit error during data read of transient buffer RAM 1,2, when single-bit error correction is
disabled.
When an ECC single-bit error occurs during when the Message Handler reads a frame, with network
management information (PPI = 1), from the transient buffer RAM 1,2, the corresponding network
management vector register NMV1,2,3 is not updated from that frame.

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Texas Instruments TMS570LC4357 Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS570LC4357
CategoryMicrocontrollers
LanguageEnglish

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