TC1796
System Units (Vol. 1 of 2)
Register Overview
User’s Manual 18-56 V2.0, 2007-07
Regs, V2.0
DMA_
DADR02
DMA Channel 02
Destination Address
Reg.
F000 3CD4
H
U, SV SV 0000 0000
H
DMA_
SHADR02
DMA Channel 02
Shadow Address
Register
F000 3CD8
H
U, SV BE 0000 0000
H
– Reserved F000 3CDC
H
BE BE –
DMA_
CHSR03
DMA Channel 03 Status
Register
F000 3CE0
H
U, SV BE 0000 0000
H
DMA_
CHCR03
DMA Channel 03 Control
Register
F000 3CE4
H
U, SV SV 0000 0000
H
DMA_
CHICR03
DMA Channel 03
Interrupt Control Register
F000 3CE8
H
U, SV SV 0000 0000
H
DMA_
ADRCR03
DMA Channel 03
Address Control Register
F000 3CEC
H
U, SV SV 0000 0000
H
DMA_
SADR03
DMA Channel 03 Source
Address Register
F000 3CF0
H
U, SV SV 0000 0000
H
DMA_
DADR03
DMA Channel 03
Destination Address
Reg.
F000 3CF4
H
U, SV SV 0000 0000
H
DMA_
SHADR03
DMA Channel 03
Shadow Address
Register
F000 3CF8
H
U, SV BE 0000 0000
H
– Reserved F000 3CFC
H
BE BE –
DMA_
CHSR04
DMA Channel 04 Status
Register
F000 3D00
H
U, SV BE 0000 0000
H
DMA_
CHCR04
DMA Channel 04 Control
Register
F000 3D04
H
U, SV SV 0000 0000
H
DMA_
CHICR04
DMA Channel 04
Interrupt Control Register
F000 3D08
H
U, SV SV 0000 0000
H
DMA_
ADRCR04
DMA Channel 04
Address Control Register
F000 3D0C
H
U, SV SV 0000 0000
H
DMA_
SADR04
DMA Channel 04 Source
Address Register
F000 3D10
H
U, SV SV 0000 0000
H
Table 18-23 Address Map of DMA (cont’d)
Short Name Description Address Access Mode Reset Value
Read Write
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