TC1796
System Units (Vol. 1 of 2)
CPU Subsystem
User’s Manual 2-38 V2.0, 2007-07
CPU, V2.0
The DMI Synchronous Trap Flag Register, DMI_STR, holds the flags that identify the
root cause of a Data-access Synchronous Bus Error (DSE). Reading DMI_STR in
supervisor mode returns the register contents and then clears its contents. Reading
DMI_STR in user mode returns the contents of the register but does not clear its
contents.
DMI_STR
DMI Synchronous Trap Flag Register
(F87FFC18
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0
LBE
STF
0
LRE
STF
rrhrrh
Field Bits Type Description
LRESTF 0rhLoad Range Synchronous Error
0
B
No error
1
B
Load range synchronous error has occurred
LBESTF 2rhBus Load Synchronous Error
0
B
No error
1
B
Bus load synchronous error has occurred
0 1,
[31:3]
r Reserved
Returns 0 when read.
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