EasyManuals Logo

Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
2150 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1842 background imageLoading...
Page #1842 background image
TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-187 V2.0, 2007-07
GPTA, V2.0
SLL 9rhSelect Line Level
0
B
Current state of select input SI is 0.
1
B
Current state of select input SI is 1.
CEN 10 rh Cell Enable
0
B
LTCk is currently disabled for local events.
1
B
LTCk is currently enabled for local events.
OCM [13:11] rw Output Control Mode Select
X00
B
Current state of LTCkOUT output line is hold.
X01
B
Current state of LTCkOUT output line is toggled.
X10
B
LTCkOUT output line is forced to 0.
X11
B
LTCkOUT output line is forced to 1.
0XX
B
LTCkOUT output line state is set by an internal
LTCk event only.
1XX
B
LTCkOUT output line state is affected by an
internal LTCk event and/or by an operation
occurred in an adjacent LTCk cell (reported by
M1I/M0I interface lines).
OIA 14 rw Output Immediate Action
0
B
No immediate action required.
1
B
Action defined by bit field OCM must be
performed immediately.
OIA is always read as 0.
OUT 15 rh Output State
0
B
LTCkOUT output line is 0.
1
B
LTCkOUT output line is 1.
0 [31:16] r Reserved
Read as 0; should be written with 0.
1) To enable Compare Mode in all cases, SOL and SOH bits must be set to 1.
Field Bits Type Description

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Infineon Technologies TC1796 and is the answer not in the manual?

Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish