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Infineon Technologies TC1796 - Page 2012

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Analog-to-Digital Converter (ADC)
User’s Manual 25-81 V2.0, 2007-07
ADC, V2.0
Note: All SCON bits are write-only bits. Reading SCON always delivers 0000 0000
H
.
SCON
Source Control Register (098
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
0 QRS TRS TRC
QEN
S
QEN
C
r wwwww
Field Bits Type Description
QENC 0wQueue Enable Clear
Writing a 1 to this bit clears bit CON.QEN (also if
QENS has been set simultaneously).
QENS 1wQueue Enable Set
Writing a 1 to this bit and a 0 to QENC sets bit
CON.QEN.
TRC 2wTimer Run Bit Clear
Writing a 1 to this bit, clears bit TCON.TR (also if TRS
has been set simultaneously).
TRS 3wTimer Run Bit Set
Writing a 1 to this bit and a 0 to TRC sets bit
TCON.TR.
QRS 4wQueue Reset
Setting bit QRS tags all queue elements invalid
(clears V bit of each queue element) and clears bits
STAT.QF and STAT.QLP.
0 [31:5] r Reserved
Read as 0; should be written with 0.

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