TC1796
Peripheral Units (Vol. 2 of 2)
Fast Analog-to-Digital Converter (FADC)
User’s Manual 26-51 V2.0, 2007-07
FADC, V2.0
The Current Result Registers CRRn store the current result of filter n. Further, status
information of filter block n can be read from CRRn.
CRR0
Filter 0 Current Result Register (64
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0MAVS0 AC 0
rrhrrh r
1514131211109876543210
0CR
rrh
Field Bits Type Description
CR [12:0] rh Current Result
This bit field ([12:0] for filter 0, [17:0] for filter 1)
contains the right-aligned current result value of
filter 0. CR is cleared when writing GCR.RSTFn = 1.
AC [26:24] rh Addition Count
This bit field indicates the number of additions of filter
input values with remain to be executed before the
next intermediate result register transfer occurs. AC
is loaded with the value of FCRn.ADDL for a new
addition sequence.
CR is cleared when writing GCR.RSTFn = 1.
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