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Infineon Technologies TC1796 - Page 34

Infineon Technologies TC1796
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User’s Manual L-26 V2.0, 2007-07
TC1796
System and Peripheral Units (Vol. 1 and 2)
Table of Contents
23.2.2.1 Parity Check and Parity Error Indication . . . . . . . . . . . . . . . . . 23-42 [2]
23.2.2.2 Non-Acknowledge Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-45 [2]
23.2.2.3 Address Prediction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-45 [2]
23.2.2.4 Automatic Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-46 [2]
23.2.2.5 Memory Access Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-47 [2]
23.2.2.6 Transmit Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-48 [2]
23.2.2.7 Transmission Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-48 [2]
23.2.3 Interface Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-49 [2]
23.2.3.1 Transmitter I/O Line Control . . . . . . . . . . . . . . . . . . . . . . . . . . 23-51 [2]
23.2.3.2 Receiver I/O Line Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-51 [2]
23.2.3.3 Connecting Several MLI Modules . . . . . . . . . . . . . . . . . . . . . . 23-53 [2]
23.2.4 MLI Service Request Generation . . . . . . . . . . . . . . . . . . . . . . . . . 23-55 [2]
23.2.5 Transmitter Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-57 [2]
23.2.5.1 Parity/Time-out Error Event . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-58 [2]
23.2.5.2 Normal Frame Sent x Event . . . . . . . . . . . . . . . . . . . . . . . . . . 23-58 [2]
23.2.5.3 Command Frame Sent Events . . . . . . . . . . . . . . . . . . . . . . . . 23-59 [2]
23.2.6 Receiver Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-60 [2]
23.2.6.1 Discarded Read Answer Event . . . . . . . . . . . . . . . . . . . . . . . . 23-60 [2]
23.2.6.2 Memory Access Protection/Parity Error Event . . . . . . . . . . . . . 23-61 [2]
23.2.6.3 Normal Frame Received/Move Engine Terminated Event . . . 23-62 [2]
23.2.6.4 Interrupt Command Frame Event . . . . . . . . . . . . . . . . . . . . . . 23-63 [2]
23.2.6.5 Command Frame Received Event . . . . . . . . . . . . . . . . . . . . . . 23-64 [2]
23.2.7 Baud Rate Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-65 [2]
23.2.8 Automatic Register Overwrite . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-66 [2]
23.3 Operating the MLI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-67 [2]
23.3.1 Connection Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-68 [2]
23.3.2 Local Transmitter and Pipe Setup . . . . . . . . . . . . . . . . . . . . . . . . 23-69 [2]
23.3.3 Remote Receiver Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-69 [2]
23.3.4 Remote Transmitter and Local Receiver Setup . . . . . . . . . . . . . . 23-70 [2]
23.3.5 Delay Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-71 [2]
23.3.6 Connection to DMA Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . 23-73 [2]
23.3.7 Connection of MLI to SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-73 [2]
23.4 MLI Kernel Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-75 [2]
23.4.1 General Module Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-78 [2]
23.4.2 General Status/Control Registers . . . . . . . . . . . . . . . . . . . . . . . . 23-81 [2]
23.4.3 Access Protection Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-88 [2]
23.4.4 Transmitter Status/Control Registers . . . . . . . . . . . . . . . . . . . . . . 23-90 [2]
23.4.5 Transmitter Data/Address Registers . . . . . . . . . . . . . . . . . . . . . 23-101 [2]
23.4.6 Transmitter Interrupt Registers . . . . . . . . . . . . . . . . . . . . . . . . . 23-105 [2]
23.4.7 Receiver Status/Control Registers . . . . . . . . . . . . . . . . . . . . . . . 23-110 [2]
23.4.8 Receiver Data/Address Registers . . . . . . . . . . . . . . . . . . . . . . . 23-114 [2]
23.4.9 Receiver Interrupt Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23-117 [2]
23.5 Implementation of the MLI0/MLI1 in TC1796 . . . . . . . . . . . . . . . . . 23-124 [2]

Table of Contents