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Infineon Technologies TC1796 - Page 426

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Data Memory Unit
User’s Manual 8-14 V2.0, 2007-07
DMU, V2.0
IEMS = 0 30 r Internal/Emulation Memory Select
This bit indicates the location of the overlay memory. In
the TC1796, this bit is always read as 0, indicating that
the DMU SRAM is used as overlay memory.
0
B
DMU SRAM is selected as overlay memory;
Block sizes are 2
n
bytes, n = 1-9;
Segment address bits [31:28] are set to 1100
B
.
Note: In an TC1796ED emulation device, this bit can
be written, too. When set, an emulation memory
is selected as overlay memory (not applicable in
the TC1796).
OVEN 31 rw Overlay Enabled
This bit controls whether or not the overlay function of
overlay block x is enabled.
0
B
Overlay function of block x is disabled.
1
B
Overlay function of block x is enabled.
0 0,
[27:16]
r Reserved
Read as 0; should be written with 0.
1) The block size is determined by the mask register OMASK.
Field Bits Type Description

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