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Infineon Technologies TC1796 - Page 743

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-79 V2.0, 2007-07
DMA, V2.0
DMAPRIO 30 rw DMA Priority
This bit determines the bus request priority that is used
when a move operation related to channel mx is
requesting FPI Bus 0. The value of DMAPRIO is also
used for the DMA-internal arbitration between the Move
Engines of the DMA.
This bit has no effect in the channel prioritization and in
the prioritization between the Move Engines.
0
B
Low priority selected
1
B
High priority selected
0 [12:9],
23,
[27:26],
29, 31
r Reserved
Read as 0; should be written with 0.
Field Bits Type Description

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