Texas Instruments TMS570LC4357

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SPNU563A–March 2018
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FlexRay Module
26.3.1.14 Transfer Occurred Offset (TOOFF)
The Transfer Occurred Offset register contains the offset vector to the highest prior pending transfer
occurred interrupt and the transfer direction.
After a read access the transfer occurred flag is cleared and the register contents will be updated
automatically.
Figure 26-52. Transfer Occurred Offset (TOOFF) [offset_TU = 60h]
31 16
Reserved
R-0
15 9 8 7 0
Reserved TDIR OFF
R-0 R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 26-32. Transfer Occurred Offset (TOOFF) Field Descriptions
Bit Field Value Description
31-9 Reserved 0 Reads return 0. Writes have no effect.
8 TDIR Transfer Direction. In case the same interrupt occurs for communication controller and Transfer Unit
State Machine transfers the PRIO bit in the Global Control register decides about the higher priority.
0 A transfer to System Memory occurred.
1 A transfer to the Communication Controller occurred.
7-0 OFF Offset Vector
0 Offset not valid (no transfer occurred, interrupt pending).
1h Interrupt pending for buffer 0.
2h Interrupt pending for buffer 1.
3h Interrupt pending for buffer 2.
: :
80h Interrupt pending for buffer 127.
81h-
FFh
Reserved