Control Registers
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SPNU563A–March 2018
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Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin
Option (MibSPIP)
28.3.33 Last TG End Pointer (LTGPEND)
Figure 28-69. Last TG End Pointer (LTGPEND) [offset = 94h]
31 29 28 24 23 16
Reserved TG IN SERVICE Reserved
R-0 R-0 R-0
15 8 7 0
LPEND Reserved
R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 28-42. Last TG End Pointer (LTGPEND) Field Descriptions
Bit Field Value Description
31-29 Reserved 0 Reads return 0. Writes have no effect.
28-24 TG IN SERVICE The TG number currently being serviced by the sequencer. These bits indicate the current
TG that is being serviced. This field can generally be used for code debugging.
0 No TG is being serviced by the sequencer.
1h TG0 is being serviced by the sequencer.
: :
10h TG15 is being serviced by the sequencer.
Note: The number of transfer groups varies by device.
11h-1Fh Invalid values.
23-16 Reserved 0 Reads return 0. Writes have no effect.
15-8 LPEND 0-FFh Last TG end pointer. Usually the TG end address (PEND) is inherently defined by the start
value of the starting pointer of the subsequent TG (PSTART). The TG ends one word
before the next TG starts (PEND[x] = PSTART[x+1] - 1). For a full configuration of MibSPI,
the last TG has no subsequent TG, that is, no end address is defined. Therefore, LPEND
has to be programmed to specify explicitly the end address of the last TG.
Note: For MibSPI1 that supports 256 buffers (values from 0-FFh), bit 15 is used. For
MibSPI2-5 that support 128 buffers (values from 0-7Fh), bit 15 is reserved.
Note: When using all 8 transfer groups, program the LPEND bits to define the end of
the last transfer group. When using less than 8 transfer groups, leave the LPEND bits
programmed to point to the end of the buffer and create a dummy transfer group that
defines the end of your last intentional transfer group and occupies all the remaining
buffer space.
7-0 Reserved 0 Reads return 0. Writes have no effect.
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