Introduction
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SPNU563A–March 2018
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Serial Communication Interface (SCI) Module
30.1 Introduction
The SCI module is a universal asynchronous receiver-transmitter that implements the standard nonreturn
to zero format. The SCI can be used to communicate, for example, through an RS-232 port or over a K-
line.
30.1.1 SCI Features
The following are the features of the SCI module:
• Standard universal asynchronous receiver-transmitter (UART) communication
• Supports full- or half-duplex operation
• Standard nonreturn to zero (NRZ) format
• Double-buffered receive and transmit functions
• Supports two individually enabled interrupt lines: level 0 and level 1
• Configurable frame format of 3 to 13 bits per character based on the following:
– Data word length programmable from one to eight bits
– Additional address bit in address-bit mode
– Parity programmable for zero or one parity bit, odd or even parity
– Stop programmable for one or two stop bits
• Asynchronous or isosynchronous communication modes with no CLK pin
• Two multiprocessor communication formats allow communication between more than two devices
• Sleep mode is available to free CPU resources during multiprocessor communication and then wake
up to receive an incoming message
• The 24-bit programmable baud rate supports 2
24
different baud rates provide high accuracy baud rate
selection
• Capability to use Direct Memory Access (DMA) for transmit and receive data
• Four error flags and Five status flags provide detailed information regarding SCI events
• Two external pins: SCIRX and SCITX
NOTE: SCI module does not support UART Hardware Flow Control. This feature can be
implemented in Software using a General Purpose I/O pin.
30.1.2 Block Diagram
Three Major components of the SCI Module are:
• Transmitter
• Baud Clock Generator
• Receiver
Transmitter (TX) contains two major registers to perform double buffering:
• The transmitter data buffer register (SCITD) contains data loaded by the CPU to be transferred to the
shift register for transmission.
• The transmitter shift register (SCITXSHF) loads data from the data buffer (SCITD) and shifts data onto
the SCITX pin, one bit at a time.
Baud Clock Generator
• A programmable baud generator produces a baud clock scaled from VCLK.
Receiver (RX) contains two major registers to perform double buffering:
• The receiver shift register (SCIRXSHF) shifts data in from the SCIRX pin one bit at a time and
transfers completed data into the receive data buffer.
• The receiver data buffer register (SCIRD) contains received data transferred from the receiver shift
register
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