Texas Instruments TMS570LC4357 - Page 19

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19
SPNU563A–March 2018
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Contents
24.6 Examples................................................................................................................. 1181
24.6.1 Application Examples for Setting the Transfer Modes of CP A and B of a DCP ..................... 1181
24.6.2 Software Example Sequence Assuming Circular Mode for Both CP A and B ........................ 1181
24.6.3 Example of an Interrupt Dispatch Flow for a Request Lost Interrupt................................... 1182
25 General-Purpose Input/Output (GIO) Module ...................................................................... 1183
25.1 Overview.................................................................................................................. 1184
25.2 Quick Start Guide ....................................................................................................... 1185
25.3 Functional Description of GIO Module................................................................................ 1187
25.3.1 I/O Functions................................................................................................... 1187
25.3.2 Interrupt Function ............................................................................................. 1188
25.3.3 GIO Block Diagram ........................................................................................... 1188
25.4 Device Modes of Operation............................................................................................ 1190
25.4.1 Emulation Mode ............................................................................................... 1190
25.4.2 Power-Down Mode (Low-Power Mode) .................................................................... 1190
25.5 GIO Control Registers .................................................................................................. 1191
25.5.1 GIO Global Control Register (GIOGCR0).................................................................. 1192
25.5.2 GIO Interrupt Detect Register (GIOINTDET) .............................................................. 1193
25.5.3 GIO Interrupt Polarity Register (GIOPOL) ................................................................. 1194
25.5.4 GIO Interrupt Enable Registers (GIOENASET and GIOENACLR) ..................................... 1195
25.5.5 GIO Interrupt Priority Registers (GIOLVLSET and GIOLVLCLR)....................................... 1197
25.5.6 GIO Interrupt Flag Register (GIOFLG) ..................................................................... 1200
25.5.7 GIO Offset Register 1 (GIOOFF1) .......................................................................... 1201
25.5.8 GIO Offset B Register (GIOOFF2).......................................................................... 1202
25.5.9 GIO Emulation A Register (GIOEMU1) .................................................................... 1203
25.5.10 GIO Emulation B Register (GIOEMU2)................................................................... 1204
25.5.11 GIO Data Direction Registers (GIODIR[A-B])............................................................ 1205
25.5.12 GIO Data Input Registers (GIODIN[A-B])................................................................. 1205
25.5.13 GIO Data Output Registers (GIODOUT[A-B]) ........................................................... 1206
25.5.14 GIO Data Set Registers (GIODSET[A-B])................................................................ 1206
25.5.15 GIO Data Clear Registers (GIODCLR[A-B]) ............................................................. 1207
25.5.16 GIO Open Drain Registers (GIOPDR[A-B]) .............................................................. 1207
25.5.17 GIO Pull Disable Registers (GIOPULDIS[A-B]).......................................................... 1208
25.5.18 GIO Pull Select Registers (GIOPSL[A-B])................................................................ 1208
25.6 I/O Control Summary ................................................................................................... 1209
26 FlexRay Module .............................................................................................................. 1210
26.1 Overview.................................................................................................................. 1211
26.1.1 Feature List .................................................................................................... 1211
26.1.2 FlexRay Module Block Diagram............................................................................. 1211
26.1.3 FlexRay Module Blocks ...................................................................................... 1214
26.2 Module Operation ....................................................................................................... 1215
26.2.1 Transfer Unit ................................................................................................... 1215
26.2.2 Communication Cycle ........................................................................................ 1226
26.2.3 Communication Modes ....................................................................................... 1227
26.2.4 Clock Synchronization........................................................................................ 1228
26.2.5 Error Handling ................................................................................................. 1229
26.2.6 Communication Controller States ........................................................................... 1231
26.2.7 Network Management ........................................................................................ 1243
26.2.8 Filtering and Masking......................................................................................... 1243
26.2.9 Transmit Process.............................................................................................. 1246
26.2.10 Receive Process............................................................................................. 1248
26.2.11 FIFO Function................................................................................................ 1249
26.2.12 Message Handling........................................................................................... 1250
26.2.13 Module RAMs ................................................................................................ 1258