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Control Registers and Control Packets
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SPNU563A–March 2018
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Direct Memory Access Controller (DMA) Module
20.3.1.78 DMA Memory Protection Region 5 Start Address Register (DMAMPR5S)
Figure 20-95. DMA Memory Protection Region 5 Start Address Register (DMAMPR5S)
[offset = 1E8h]
31 0
STARTADDRESS
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset
Table 20-85. DMA Memory Protection Region 5 Start Address Register (DMAMPR5S)
Field Descriptions
Bit Field Description
31-0 STARTADDRESS Start Address defines the address at which the region begins. The effective start address is truncated
to the nearest word address, that is, 0x103 = 0x100.
20.3.1.79 DMA Memory Protection Region 5 End Address Register (DMAMPR5E)
Figure 20-96. DMA Memory Protection Region 5 End Address Register (DMAMPR5E)
[offset = 1ECh]
31 0
ENDADDRESS
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privilege mode only; -n = value after reset
Table 20-86. DMA Memory Protection Region 5 End Address Register (DMAMPR5E)
Field Descriptions
Bit Field Description
31-0 ENDADDRESS End Address defines the address at which the region ends. The end address usually is larger than the
start address for this region; otherwise, the region will wrap around at the end of the address space.
The end address is the start address plus the region length minus 1. The effective end address is
rounded up to the nearest 32-bit word end address, that is, 0x200 = 0x203.
Note: When using 64-bit transfers, the address is rounded up to the nearest 64-bit word end
address, that is, 0x200 = 0x207. All other transfers are rounded up to the nearest 32-bit word
end address.
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