Basic Operation
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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
Now suppose that the application has enabled the enhanced channel selection mode for Group1 with the
G1_MAX_COUNT register configured to be 3. Also suppose that the application has programmed the
Group1 LUT as shown in Figure 22-12. Now suppose that the application triggers Group1 conversions by
writing 0x80000001 to ADG1SEL, that is, bits 0 and 31 are set and all others are zeros. The ADC
conversions will proceed in the following sequence:
• Input Channel Selection
The initial value of G1_CURRENT_COUNT is 0, which is used as the index into the Group1 LUT. The
row 0 of Group1's LUT has values of 1 for the G1_EXT_CHN_MUX_SEL and a value of 1 for the
G1_INT_CHN_MUX_SEL. The 5-bit external channel id of 0b00001 is driven out on the AD1EXT_SEL
terminals. This selects channel 1 for all the connected external analog multiplexors, as shown in
Figure 22-12. The ADC module also outputs an enable signal to the external analog multiplexors via
the AD1EXT_ENA terminal.
Now consider the fact that the internal channel id is also configured to be 1 in row 0 of the Group1
LUT. This causes the switch for ADC's internal channel 1 (ADIN1) to be closed. All other internal ADC
input switches (ADIN0, ADIN2, ADIN3, ..., ADIN31) will be open. Note that the ADIN1 input channel is
actually connected to the output of an 8:1 analog multiplexor.
In effect, the ADC will convert channel 1 of the 8:1 analog multiplexor connected to the ADIN1 terminal
of the microcontroller.
• After Completion of Conversion
Once the first conversion is completed, the CURRENT_COUNT value of 0 is stored in the "channel id"
field of the conversion result RAM of Group1 along with the actual conversion result from the ADC
core. Then the G1_CURRENT_COUNT value of 0 is compared against the G1_MAX_COUNT value of
3. The values do not match, so that G1_CURRENT_COUNT is incremented from 0 to 1.
• Next Channel Selection
There are two bits set in the ADG1SEL register, so that the ADC module now uses the
G1_CURRENT_COUNT value of 1 to index the Group1 LUT. As shown in Figure 22-12, this row in
Group1 LUT contains 4 as the G1_EXT_CHN_MUX_SEL and 2 as the G1_INT_CHN_MUX_SEL.
ADC input channel ADIN2 is not connected to any external analog multiplexor and is connected
directly to the analog signal to be converted. Note that the ADC module still drives the AD1EXT_ENA
and the AD1EXT_SEL (value of 4, that is, 0b00100) to all the external analog multiplexors connected
to the microcontroller.
• End of Conversion Sub-Sequence
Once the conversion of the internal channel ADIN2 is completed, the G1_CURRENT_COUNT of 1 is
stored in the "channel id" field of the Group1 result RAM along with the actual conversion result. This
value of 1 is compared against the G1_MAX_COUNT value of 3. The values do not match, so that
G1_CURRENT_COUNT is incremented from 1 to 2.
There are no more conversions required in this sub-sequence as only two bits are set in ADG1SEL.
• Continuation on Next Group1 Trigger
When the ADC Group1 is triggered again or if Group1 is in continuous conversion mode, the
G1_CURRENT_COUNT of 2 is again used to index the Group1 LUT. Following the same reasoning as
before, this will cause the channel 1 of the 8:1 analog multiplexor connected to ADIN1 to be converted.
Once this conversion is done, the G1_CURRENT_COUNT value of 2 is stored in the "channel id" field
of the result RAM along with the conversion result. This still does not match the G1_MAX_COUNT of
3, so that G1_CURRENT_COUNT is now incremented from 2 to 3.
This index value of 3 is used to again convert channel ADIN2, following the same reasoning as before.
When this conversion is completed, the G1_CURRENT_COUNT of 3 is stored as the "channel id" field
of the result RAM along with the conversion result.
Also, now this G1_CURRENT_COUNT value of 3 matches the G1_MAX_COUNT. This resets the
G1_CURRENT_COUNT to 0.
The sequence proceeds as described whenever Group1 is next triggered, or if Group1 is configured to be
in a continuous conversion mode.
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