Infineon Technologies TC1796 - Page 1107

TC1796
System Units (Vol. 1 of 2)
Register Overview
User’s Manual 18-118 V2.0, 2007-07
Regs, V2.0
Table 18-37 Address Map of DMU
Short Name Description Address Access Mode Reset Value
Read Write
Data Memory Unit (DMU)
– Reserved F801 0100
H
-
F801 0104
H
BE BE –
DMU_ID DMU Module
Identification Register
F801 0108
H
U, SV BE 002D C0XX
H
– Reserved F801 010C
H
BE BE –
– Reserved
1)
F801 0110
H
U, SV U,
SV, E
–
– Reserved F801 0114
H
BE BE –
– Reserved
1)
F801 0118
H
BE U,
SV,
E, 32
–
– Reserved
1)
F801 011C
H
U, SV BE –
DMU_
RABR0
DMU Redirected Address
Base Register 0
F801 0120
H
U, SV SV 0000 0000
H
DMU_
OTAR0
DMU Overlay Target
Address Register 0
F801 0124
H
U, SV SV 0000 0000
H
DMU_
OMASK0
DMU Overlay Mask
Register 0
F801 0128
H
U, SV SV 0FFF FE00
H
DMU_
RABR1
DMU Redirected Address
Base Register 1
F801 012C
H
U, SV SV 0000 0000
H
DMU_
OTAR1
DMU Overlay Target
Address Register 1
F801 0130
H
U, SV SV 0000 0000
H
DMU_
OMASK1
DMU Overlay Mask
Register 1
F801 0134
H
U, SV SV 0FFF FE00
H
DMU_
RABR2
DMU Redirected Address
Base Register 2
F801 0138
H
U, SV SV 0000 0000
H
DMU_
OTAR2
DMU Overlay Target
Address Register 2
F801 013C
H
U, SV SV 0000 0000
H
DMU_
OMASK2
DMU Overlay Mask
Register 2
F801 0140
H
U, SV SV 0FFF FE00
H
DMU_
RABR3
DMU Redirected Address
Base Register 3
F801 0144
H
U, SV SV 0000 0000
H