Texas Instruments TMS570LC4357

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SPNU563A–March 2018
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Architecture
Table 2-2. Module Registers / Memories Memory-Map (continued)
Target Name
Memory
Select
Address Range
Frame Size Actual Size
Response for
Access to
Unimplemented
Locations in
FrameStart End
MIBSPI4 RAM PCS[3] 0xFF06_0000 0xFF07_FFFF 128kB 2kB Abort for
accesses above
2KB
MIBSPI3 RAM PCS[6] 0xFF0C_0000 0xFF0D_FFFF 128kB 2kB Abort for
accesses above
2KB
MIBSPI2 RAM PCS[4] 0xFF08_0000 0xFF09_FFFF 128kB 2kB Abort for
accesses above
2KB
MIBSPI1 RAM PCS[7] 0xFF0E_0000 0xFF0F_FFFF 128kB 4kB Abort for
accesses above
4KB
DCAN4 RAM PCS[12] 0xFF18_0000 0xFF19_FFFF 128kB 8kB Abort generated
for accesses
beyond offset
0x2000
DCAN3 RAM PCS[13] 0xFF1A_0000 0xFF1B_FFFF 128kB 8kB Abort generated
for accesses
beyond offset
0x2000
DCAN2 RAM PCS[14] 0xFF1C_0000 0xFF1D_FFFF 128kB 8kB Abort generated
for accesses
beyond offset
0x2000
DCAN1 RAM PCS[15] 0xFF1E_0000 0xFF1F_FFFF 128kB 8kB Abort generated
for accesses
beyond offset
0x2000.
MIBADC2 RAM PCS[29] 0xFF3A_0000 0xFF3B_FFFF 128kB 8kB Wrap around for
accesses to
unimplemented
address offsets
lower than
0x1FFF.
MIBADC2 Look-UP
Table
384 bytes Look-Up Table
for ADC2
wrapper. Starts
at address offset
0x2000 and
ends at address
offset 0x217F.
Wrap around for
accesses
between offsets
0x0180 and
0x3FFF. Abort
generation for
accesses
beyond offset
0x4000.