Texas Instruments TMS570LC4357

FlexRay Module Registers www.ti.com
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SPNU563A–March 2018
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FlexRay Module
26.3.1.12 Transfer to System Memory Occurred (TSMO[1-4])
The Transfer to System Memory Occurred register reflects the message buffer transfer status for a
transfer transaction to the system memory. Four 32-bit registers reflect all possible 128 message buffers.
NOTE: Writing 1 will clear a bit. Writing 0 will leave a bit unchanged.
Figure 26-44. Transfer to System Memory Occurred 1 (TSMO1) [offset_TU = 40h]
31 16
TSMO1[31-16]
R/W1C-0
15 0
TSMO1[15-0]
R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear; -n = value after reset
Figure 26-45. Transfer to System Memory Occurred 2 (TSMO2) [offset_TU = 44h]
31 16
TSMO2[63-48]
R/W1C-0
15 0
TSMO2[47-32]
R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear; -n = value after reset
Figure 26-46. Transfer to System Memory Occurred 3 (TSMO3) [offset_TU = 48h]
31 16
TSMO3[95-80]
R/W1C-0
15 0
TSMO3[79-64]
R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear; -n = value after reset
Figure 26-47. Transfer to System Memory Occurred 4 (TSMO4) [offset_TU = 4Ch]
31 16
TSMO4[127-112]
R/W1C-0
15 0
TSMO4[111-96]
R/W1C-0
LEGEND: R/W = Read/Write; W1C = Write 1 to clear; -n = value after reset