FlexRay Module Registers
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SPNU563A–March 2018
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FlexRay Module
26.3.2.2.7 Interrupt Line Enable Register (ILE)
Each of the two interrupt lines (CC_int0, CC_int1) can be enabled separately by programming bit EINT0
and EINT1.
Figure 26-123 and Table 26-102 illustrate this register.
Figure 26-123. Interrupt Line Enable Register (ILE) [offset_CC = 40h]
31 16
Reserved
R-0
15 2 1 0
Reserved EINT
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 26-102. Interrupt Line Enable Register (ILE) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reads return 0. Writes have no effect.
1-0 EINT Enable interrupt line (1-0).
0 Interrupt line CC_int1 and CC_int0 are disabled.
1h Interrupt line CC_int1 is disabled and CC_int0 is enabled.
2h Interrupt line CC_int1 is enabled and CC_int0 is disabled.
3h Interrupt line CC_int1 and CC_int0 are enabled.
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