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Texas Instruments TMS570LC4357 - Page 1709

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SCI/LIN Control Registers
1709
SPNU563AMarch 2018
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Copyright © 2018, Texas Instruments Incorporated
Serial Communication Interface (SCI)/ Local Interconnect Network (LIN)
Module
29.7.24 LIN Receive Buffer 0 Register (LINRD0)
Figure 29-53 and Table 29-41 illustrate this register.
Figure 29-53. LIN Receive Buffer 0 Register (LINRD0) (offset = 64h)
31 24 23 16
RD0 RD1
R-0 R-0
15 8 7 0
RD2 RD3
R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 29-41. LIN Receive Buffer 0 Register (LINRD0) Field Descriptions
Bit Field Value Description
31-24 RD0 0-FFh Receive buffer 0. Byte 0 of the response data byte. Each response data-byte that is received in
the SCIRXSHFT register is transferred to the corresponding RDy bit field according to the number
of bytes received. A read of this byte clears the RXDY byte.
Note: RD<x-1> is equivalent to data byte <x> of the LIN frame.
23-16 RD1 0-FFh Receive buffer 1. Byte 1 of the response data byte. Each response data-byte that is received in
the SCIRXSHFT register is transferred to the corresponding RDy register according to the number
of bytes received.
15-8 RD2 0-FFh Receive buffer 2. Byte 2 of the response data byte. Each response data-byte that is received in
the SCIRXSHFT register is transferred to the corresponding RDy register according to the number
of bytes received.
7-0 RD3 0-FFh Receive buffer 3. Byte 3 of the response data byte. Each response data-byte that is received in
the SCIRXSHFT register is transferred to the corresponding RDy register according to the number
of bytes received.

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