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Texas Instruments TMS570LC4357 User Manual

Texas Instruments TMS570LC4357
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SCI Control Registers
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1744
SPNU563AMarch 2018
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Copyright © 2018, Texas Instruments Incorporated
Serial Communication Interface (SCI) Module
Table 30-9. SCI Clear Interrupt Level Register (SCICLEARINTLVL) Field Descriptions (continued)
Bit Field Value Description
25 CLR CE INT LVL Clear overrun-error interrupt.
0 Read: The interrupt level is mapped to the INT0 line.
Write: No effect.
1 Read: The interrupt level is mapped to the INT1 line.
Write: The interrupt level is mapped to the INT0 line.
24 CLR PE INT LVL Clear parity interrupt.
0 Read: The interrupt level is mapped to the INT0 line.
Write: No effect.
1 Read: The interrupt level is mapped to the INT1 line.
Write: The interrupt level is mapped to the INT0 line.
23-19 Reserved 0 Reads return 0. Writes have no effect.
18 CLR RX DMA ALL LVL Clear receive DMA interrupt level.
0 Read: The receive interrupt request for address frames is mapped to the INT0 line.
Write: No effect.
1 Read: The receive interrupt request for address frames is mapped to the INT1 line.
Write: The receive interrupt request for address frames is mapped to the INT0 line.
17-10 Reserved 0 Reads return 0. Writes have no effect.
9 CLR RX INT LVL Clear receiver interrupt.
0 Read: The interrupt level is mapped to the INT0 line.
Write: No effect.
1 Read: The interrupt level is mapped to the INT1 line.
Write: The interrupt level is mapped to the INT0 line.
8 CLR TX INT LVL Clear transmitter interrupt.
0 Read: The interrupt level is mapped to the INT0 line.
Write: No effect.
1 Read: The interrupt level is mapped to the INT1 line.
Write: The interrupt level is mapped to the INT0 line.
7-2 Reserved 0 Reads return 0. Writes have no effect.
1 CLR WAKEUP INT LVL Clear wakeup interrupt.
0 Read: The interrupt level is mapped to the INT0 line.
Write: No effect.
1 Read: The interrupt level is mapped to the INT1 line.
Write: The interrupt level is mapped to the INT0 line.
0 CLR BRKDT INT LVL Clear breakdetect interrupt.
0 Read: The interrupt level is mapped to the INT0 line.
Write: No effect.
1 Read: The interrupt level is mapped to the INT1 line.
Write: The interrupt level is mapped to the INT0 line.

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Texas Instruments TMS570LC4357 Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS570LC4357
CategoryMicrocontrollers
LanguageEnglish

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