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Texas Instruments TMS570LC4357

Texas Instruments TMS570LC4357
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EMAC Module Registers
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1900
SPNU563AMarch 2018
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Copyright © 2018, Texas Instruments Incorporated
EMAC/MDIO Module
Table 32-60. Receive Multicast/Broadcast/Promiscuous Channel Enable Register (RXMBPENABLE)
Field Descriptions (continued)
Bit Field Value Description
2-0 RXMULTCH Receive multicast channel select.
0 Select channel 0 to receive multicast frames.
1h Select channel 1 to receive multicast frames.
2h Select channel 2 to receive multicast frames.
3h Select channel 3 to receive multicast frames.
4h Select channel 4 to receive multicast frames.
5h Select channel 5 to receive multicast frames.
6h Select channel 6 to receive multicast frames.
7h Select channel 7 to receive multicast frames.
32.5.22 Receive Unicast Enable Set Register (RXUNICASTSET)
The receive unicast enable set register (RXUNICASTSET) is shown in Figure 32-63 and described in
Table 32-61.
Figure 32-63. Receive Unicast Enable Set Register (RXUNICASTSET) (offset = 104h)
31 16
Reserved
R-0
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
RXCH7EN RXCH6EN RXCH5EN RXCH4EN RXCH3EN RXCH2EN RXCH1EN RXCH0EN
R/W1S-0 R/W1S-0 R/W1S-0 R/W1S-0 R/W1S-0 R/W1S-0 R/W1S-0 R/W1S-0
LEGEND: R/W = Read/Write; R = Read only; W1S = Write 1 to set (writing a 0 has no effect); -n = value after reset
Table 32-61. Receive Unicast Enable Set Register (RXUNICASTSET) Field Descriptions
Bit Field Value Description
31-8 Reserved 0 Reserved
7 RXCH7EN 0-1 Receive channel 7 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
6 RXCH6EN 0-1 Receive channel 6 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
5 RXCH5EN 0-1 Receive channel 5 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
4 RXCH4EN 0-1 Receive channel 4 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
3 RXCH3EN 0-1 Receive channel 3 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
2 RXCH2EN 0-1 Receive channel 2 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
1 RXCH1EN 0-1 Receive channel 1 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.
0 RXCH0EN 0-1 Receive channel 0 unicast enable set bit. Write 1 to set the enable, a write of 0 has no effect.
May be read.

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