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EMAC Module Registers
1905
SPNU563A–March 2018
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EMAC/MDIO Module
Table 32-68. MAC Control Register (MACCONTROL) Field Descriptions (continued)
Bit Field Value Description
5 GMIIEN GMII enable bit. This bit must be set before the MAC transmits or receives data in any of the
supported interface modes. (for instance, MII, RMII). This bit does not select the interface
mode but rather holds or releases the MAC TX and RX state machines from reset.
0 The MAC RX and TX state machines are held in reset.
1 The MAC RX and TX state machines are released from reset and transmit and receive are
enabled.
4 TXFLOWEN Transmit flow control enable bit. This bit determines if incoming pause frames are acted upon
in full-duplex mode. Incoming pause frames are not acted upon in half-duplex mode,
regardless of this bit setting. The RXMBPENABLE bits determine whether or not received
pause frames are transferred to memory.
0 Transmit flow control is disabled. Full-duplex mode: incoming pause frames are not acted
upon.
1 Transmit flow control is enabled. Full-duplex mode: incoming pause frames are acted upon.
3 RXBUFFERFLOWEN Receive buffer flow control enable bit.
0 Receive flow control is disabled. Half-duplex mode: no flow control generated collisions are
sent. Full-duplex mode: no outgoing pause frames are sent.
1 Receive flow control is enabled. Half-duplex mode: collisions are initiated when receive buffer
flow control is triggered. Full-duplex mode: outgoing pause frames are sent when receive flow
control is triggered.
2 Reserved 0 Reserved
1 LOOPBACK Loopback mode. The loopback mode forces internal full-duplex mode regardless of the
FULLDUPLEX bit. The loopback bit should be changed only when GMIIEN bit is deasserted.
0 Loopback mode is disabled.
1 Loopback mode is enabled.
0 FULLDUPLEX Full-duplex mode.
0 Half-duplex mode is enabled.
1 Full-duplex mode is enabled.
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