Texas Instruments TMS570LC4357

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1951
SPNU563A–March 2018
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Enhanced Capture (eCAP) Module
33.5.8 ECAP Control Regiser 1 (ECCTL1)
Figure 33-21. ECAP Control Register 1 (ECCTL1) [offset = 2Ah]
15 14 13 9 8
FREE SOFT PRESCALE CAPLDEN
R/W-0 R/W-0 R/W-0 R/W-0
7 6 5 4 3 2 1 0
CTRRST4 CAP4POL CTRRST3 CAP3POL CTRRST2 CAP2POL CTRRST1 CAP1POL
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 33-9. ECAP Control Register 1 (ECCTL1) Field Descriptions
Bits Field Value Description
15-14 FREE/SOFT Emulation Control.
0 TSCTR counter stops immediately on emulation suspend.
1h TSCTR counter runs until = 0.
2h-3h TSCTR counter is unaffected by emulation suspend (Run Free).
13-9 PRESCALE Event Filter prescale select.
0 Divide by 1 (no prescale, by-pass the prescaler).
1h Divide by 2.
2h Divide by 4.
3h Divide by 6.
4h Divide by 8.
5h Divide by 10.
: :
1Eh Divide by 60.
1Fh Divide by 62.
8 CAPLDEN Enable Loading of CAP1-4 registers on a capture event.
0 Disable CAP1-4 register loads at capture event time.
1 Enable CAP1-4 register loads at capture event time.
7 CTRRST4 Counter Reset on Capture Event 4.
0 Do not reset counter on Capture Event 4 (absolute time stamp operation).
1 Reset counter after Capture Event 4 time-stamp has been captured
(used in difference mode operation).
6 CAP4POL Capture Event 4 Polarity select.
0 Capture Event 4 triggered on a rising edge (RE).
1 Capture Event 4 triggered on a falling edge (FE).
5 CTRRST3 Counter Reset on Capture Event 3.
0 Do not reset counter on Capture Event 3 (absolute time stamp).
1 Reset counter after Event 3 time-stamp has been captured
(used in difference mode operation).
4 CAP3POL Capture Event 3 Polarity select.
0 Capture Event 3 triggered on a rising edge (RE).
1 Capture Event 3 triggered on a falling edge (FE).
3 CTRRST2 Counter Reset on Capture Event 2.
0 Do not reset counter on Capture Event 2 (absolute time stamp).
1 Reset counter after Event 2 time-stamp has been captured
(used in difference mode operation).