Texas Instruments TMS570LC4357

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307
SPNU563A–March 2018
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I/O Multiplexing and Control Module (IOMM)
Table 6-1. Multiplexing for Outputs on 337ZWT Package (continued)
Address
Offset
337ZWT
BALL
Default Function Selection
Bit
Alternate Function 1 Selection
Bit
Alternate Function 2 Selection
Bit
Alternate Function 3 Selection
Bit
Alternate Function 4 Selection
Bit
Alternate Function 5 Selection
Bit
(1)
Selecting N2HET1_NDIS or N2HET2_NDIS forces the pin to a high-impedance state and changes the pull type to pull up.
18Ch B4 N2HET1[12] 31[0] MIBSPI4NCS[5] 31[1] MII_CRS 31[2] RMII_CRS_DV 31[3]
N2 N2HET1[13] 31[8] SCI3TX 31[9] N2HET2[20] 31[11] ePWM5B 31[13]
N1 N2HET1[15] 31[16] MIBSPI1NCS[4] 31[17] N2HET2[22] 31[19] ECAP1 31[21]
A4 N2HET1[16] 31[24] EPWM1SYNCI 31[27] EPWM1SYNCO 31[29]
190h A13 N2HET1[17] 32[0] EMIF_nOE 32[1] SCI4RX 32[2]
J1 N2HET1[18] 32[8] EMIF_RNW 32[9] ePWM6A 32[13]
B13 N2HET1[19] 32[16] EMIF_nDQM[0] 32[17] SCI4TX 32[18]
P2 N2HET1[20] 32[24] EMIF_nDQM[1] 32[25] ePWM6B 32[29]
194h H4 N2HET1[21] 33[0] EMIF_nDQM[2] 33[1]
B3 N2HET1[22] 33[8] EMIF_nDQM[3] 33[9]
J4 N2HET1[23] 33[16] EMIF_BA[0] 33[17]
P1 N2HET1[24] 33[24] MIBSPI1NCS[5] 33[25] MII_RXD[0] 33[26] RMII_RXD[0] 33[27]
198h A14 N2HET1[26] 34[0] MII_RXD[1] 34[2] RMII_RXD[1] 34[3]
K19 N2HET1[28] 34[8] MII_RXCLK 34[10] RMII_REFCLK 34[11]
B11 N2HET1[30] 34[16] MII_RX_DV 34[18] eQEP2S 34[21]
D8 N2HET2[01] 34[24] N2HET1_NDIS
(1)
34[25]
19Ch D7 N2HET2[02] 35[0] N2HET2_NDIS
(1)
35[1]
D3 N2HET2[12] 35[8] MIBSPI2NENA 35[12] MIBSPI2NCS[1] 35[13]
D2 N2HET2[13] 35[16] MIBSPI2SOMI 35[20]
D1 N2HET2[14] 35[24] MIBSPI2SIMO 35[28]
1A0h P4 N2HET2[19] 36[0] LIN2RX 36[1]
T5 N2HET2[20] 36[8] LIN2TX 36[9]
T4 MII_RXCLK 36[16]
U7 MII_TX_CLK 36[24]
1A4h E2 N2HET2[03] 37[0] MIBSPI2CLK 37[4]
N3 N2HET2[07] 37[8] MIBSPI2NCS[0] 37[12]