Basic Operation
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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
• Maximum Number of Conversions
A MAX_COUNT register for each conversion group stores the maximum number of conversions to be
performed before the index into a group's LUT is reset to 0. This register can be programmed to a
value between 0 and 31. It is recommended to program the MAX_COUNT register with a value that is
one less than a multiple of the number of channels in that group's conversion sub-sequence (number
of bits that are set in the group's channel select register).
22.2.2.2.2.1 Look-Up Table Details
As described earlier, each conversion group has a look-up table (LUT) which is used when the enhanced
channel selection mode is enabled. This look-up table starts at an offset of 8kB from the base of the ADC
results RAM. The LUT holds 32 entries for each of the three conversion groups. The first 32 entries are for
the event group, the next 32 entries are for Group1 and the last 32 entries are for Group2. Figure 22-11
shows an example LUT entry for the Event group.
Figure 22-11. Example Look-Up Table Entry
31 16
Reserved
R-0
15 13 12 8 7 5 4 0
Reserved EV_EXT_CHN_MUX_SEL Reserved EV_INT_CHN_MUX_SEL
R-0 R/W-0 R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-1. ADC Look-Up Table Field Descriptions
Bit Field Value Description
31–13 Reserved 0 Reads return 0. Writes have no effect.
12–8 EV_EXT_CHN_MUX_SEL This field defines the external analog mux select that is output from the ADC module
when the Event group CURRENT_COUNT register points to this LUT entry, and when the
Event group conversion is triggered with the enhanced channel selection mode enabled.
7–5 Reserved 0 Reads return 0. Writes have no effect.
4–0 EV_INT_CHN_MUX_SEL This field defines the internal analog mux select that is output from the ADC module when
the Event group CURRENT_COUNT register points to this LUT entry, and when the Event
group conversion is triggered with the enhanced channel selection mode enabled.
This can be a value between 0 and 31, which corresponds to the internal analog input
channel number between 0 and 31. Note that this device only supports 24 input channels
for ADC1 and 16 input channels for ADC2. If the application configures an unavailable
channel number in the EV_INT_CHN_MUX_SEL field, the ADC will still perform the
conversion and the result will be indeterminate.
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