ADC Registers
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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.3.6 ADC Group1 Operating Mode Control Register (ADG1MODECR)
ADC Group1 Operating Mode Control Register (ADG1MODECR) is shown in Figure 22-26 and Figure 22-
27, and described in Table 22-12. As shown, the format of the ADG1MODECR is different based on
whether the ADC module is configured to be a 12-bit or a 10-bit ADC module.
Figure 22-26. 12-bit ADC Group1 Operating Mode Control Register (ADG1MODECR)
[offset = 14h]
31 24
Reserved
R-0
23 17 16
Reserved
No Reset on
ChnSel
R-0 R/W-0
15 10 9 8
Reserved G1_DATA_FMT
R-0 R/W-0
7 6 5 4 3 2 1 0
Reserved G1_CHID OVR_G1_
RAM_IGN
G1_HW_TRIG Reserved G1_MODE FRZ_G1
R-0 R/W-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 22-27. 10-bit ADC Group1 Operating Mode Control Register (ADG1MODECR)
[offset = 14h]
31 24
Reserved
R-0
23 17 16
Reserved
No Reset on
ChnSel
R-0 R/W-0
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
Reserved G1_CHID OVR_G1_
RAM_IGN
G1_HW_TRIG G1_8BIT G1_MODE FRZ_G1
R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset