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FlexRay Module Registers
1299
SPNU563A–March 2018
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FlexRay Module
26.3.1.19 Trigger Transfer to System Memory Set/Reset (TTSMS[1-4]/TTSMR[1-4])
The Trigger Transfer to System Memory register selects the current message buffer for a Transfer Unit
State Machine transfer transaction to system memory. Four 32-bit registers reflect all possible 128
message buffers.
The bits are set by writing 1 to TTSMSx and reset by writing 1 to TTSMRx or after the transfer occurred.
Writing a 0 has no effect. Reading from both addresses will result in the same value.
Figure 26-58. Trigger Transfer to System Memory Set 1 (TTSMS1) [offset_TU = 80h]
31 16
TTSMS1[31-16]
R/WS-0
15 0
TTSMS1[15-0]
R/WS-0
LEGEND: R/W = Read/Write; R = Read only; S = Set; -n = value after reset
Table 26-38. Trigger Transfer to System Memory Set 1 (TTSMS1) Field Descriptions
Bit Field Value Description
31-0 TTSMS1[n] Trigger Transfer to System Memory Set 1. The register bits 0 to 31 correspond to message buffers
0 to 31. Each bit of the register controls the message buffer transfer to the system memory in the
following manner (not that only the least significant bit of all four combined TTSM registers will
currently scheduled for transmission).
0 No transfer request.
1 Transfer based on address defined in TBA
Figure 26-59. Trigger Transfer to System Memory Reset 1 (TTSMR1) [offset_TU = 84h]
31 16
TTSMR1
R/WC-0
15 0
TTSMR1
R/WC-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset
Table 26-39. Trigger Transfer to System Memory Reset 1 (TTSMR1) Field Descriptions
Bit Field Description
31-0 TTSMR1 Trigger Transfer to System Memory Reset 1. The TTSMR1 register shows the identical values to TTSMS1 if
read.
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