FlexRay Module Registers
www.ti.com
1320
SPNU563A–March 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
FlexRay Module
Figure 26-100. Transfer to Communication Controller Interrupt Enable Set 2 (TCCIES2)
[offset_TU = 128h]
31 16
TCCIES2[63-48]
R/WS-0
15 0
TCCIES2[47-32]
R/WS-0
LEGEND: R/W = Read/Write; R = Read only; S = Set; -n = value after reset
Table 26-80. Transfer to Communication Controller Interrupt Enable Set 2 (TCCIES2)
Field Descriptions
Bit Field Value Description
31-0 TCCIES2[n] Transfer to Communication Controller Interrupt Enable Set 2. The register bits 0 to 31 correspond
to message buffers 32 to 63. Each bit of the register enables a potential interrupt, which occurs if
the corresponding TCCO2 bit is set:
0 No interrupt.
1 Interrupt is generated.
Figure 26-101. Transfer to Communication Controller Interrupt Enable Reset 2 (TCCIER2)
[offset_TU = 12Ch]
31 16
TCCIER2
R/WC-0
15 0
TCCIER2
R/WC-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset
Table 26-81. Transfer to Communication Controller Interrupt Enable Reset 2 (TCCIER2)
Field Descriptions
Bit Field Description
31-0 TCCIER2 Transfer to Communication Controller Interrupt Enable Reset 2. The TCCIER2 register shows the identical
values to TCCIES2 if read.