FlexRay Module Registers
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SPNU563A–March 2018
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FlexRay Module
26.3.2.3.11 GTU Configuration Register 4 (GTUC4)
The communication controller accepts modifications of the register in DEFAULT_CONFIG or CONFIG
state only. Figure 26-138 and Table 26-117 illustrate this register.
Figure 26-138. GTU Configuration Register 4 (GTUC4) [offset_CC = ACh]
31 30 29 16
Reserved OCS*
R-0 R/W-Ah
15 14 13 0
Reserved NIT*
R-0 R/W-9h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset; *These bits can be updated in DEFAULT_CONFIG or CONFIG state
only
Table 26-117. GTU Configuration Register 4 (GTUC4) Field Descriptions
Bit Field Value Description
31-30 Reserved 0 Reads return 0. Writes have no effect.
29-16 OCS 8h-3E7Eh MT Offset correction start (in macroticks). These bits determine the start of the offset correction
within the NIT phase, calculated from start of cycle. Must be identical in all nodes of a cluster.
15-14 Reserved 0 Reads return 0. Writes have no effect.
13-0 NIT 7h-3E7Dh MT Network idle time start (in macroticks). These bits configure the starting point of the network idle
time (NIT) at the end of the communication cycle expressed in terms of macroticks from the
beginning of the cycle. The number must be identical in all nodes of a cluster.
26.3.2.3.12 GTU Configuration Register 5 (GTUC5)
The communication controller accepts modifications of the register in DEFAULT_CONFIG or CONFIG
state only. Figure 26-139 and Table 26-118 illustrate this register.
Figure 26-139. GTU Configuration Register 5 (GTUC5) [offset_CC = B0h]
31 24 23 21 20 16
DEC* Reserved CDD*
R/W-Eh R-0 R/W-0
15 8 7 0
DCB* DCA*
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset; *These bits can be updated in DEFAULT_CONFIG or CONFIG state
only
Table 26-118. GTU Configuration Register 5 (GTUC5) Field Descriptions
Bit Field Value Description
31-24 DEC Eh-8Fh µT Decoding correction (in microticks). These bits configure the decoding correction value used to
determine the primary time reference point.
23-21 Reserved. 0 Reads return 0. Writes have no effect.
20-16 CDD 0-14h µT Cluster drift damping (in microticks). These bits configure the cluster drift damping value used in
clock synchronization to minimize accumulation of rounding errors.
15-8 DCB 0-C8h µT Delay compensation channel B (in microticks). These bits are used to compensate for reception
delays on the indicated channel. This compensates propagation delays for microticks in the
range of 0.0125 to 0.05s. In practice, the minimum propagation delay of all sync nodes should
be applied.
7-0 DCA 0-C8h µT Delay compensation channel A (in microticks). These bits are used to compensate for reception
delays on the indicated channel. This compensates propagation delays for microticks in the
range of 0.0125 to 0.05s. In practice, the minimum propagation delay of all sync nodes should
be applied.
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