FlexRay Module Registers
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SPNU563A–March 2018
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FlexRay Module
26.3.2.8.2 Write Header Section Register 1 (WRHS1)
Figure 26-181 and Table 26-153 illustrate this register.
Figure 26-181. Write Header Section Register 1 (WRHS1) [offset_CC = 500h]
31 30 29 28 27 26 25 24 23 22 16
Reserved MBI TXM PPIT CFG CHB CHA Rsvd CYC
R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0 R/W-0
15 11 10 0
Reserved FID
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 26-153. Write Header Section Register 1 (WRHS1) Field Descriptions
Bit Field Value Description
31-30 Reserved 0 Reads return 0. Writes have no effect.
29 MBI Message buffer interrupt. This bit enables the receive/transmit interrupt for the corresponding
message buffer. After a dedicated receive buffer has been updated by the message handler, flag
RXI and/or MBSI in the status interrupt register are set. After successful transmission the TXI flag
in the status interrupt register is set.
0 The corresponding message buffer interrupt is enabled.
1 The corresponding message buffer interrupt is disabled.
28 TXM Transmission mode. This bit is used to select the transmission mode.
0 Continuous mode.
1 Single-shot mode.
27 PPIT Payload preamble indicator transmit. This bit is used to control the state of the Payload Preamble
Indicator in transmit frames. If the bit is set in a static message buffer, the respective message
buffer holds network management information. If the bit is set in a dynamic message buffer, the
first two bytes of the payload segment may be used for message ID filtering by the receiver.
Message ID filtering of received FlexRay frames is not supported by the FlexRay module, but can
be done by the host CPU.
0 Payload Preamble Indicator is not set.
1 Payload Preamble Indicator is set.
26 CFG Message buffer configuration bit. This bit is used to configure the corresponding buffer as transmit
buffer or as receive buffer. For message buffers belonging to the receive FIFO the bit is not
evaluated.
0 The corresponding buffer is configured as receive buffer.
1 The corresponding buffer is configured as transmit buffer.
25-24 CHB, CHA 0-3h Channel filter control.
The 2-bit channel filtering field associated with each buffer serves as a filter for receive buffers and
as a control field for transmit buffers. See Table 26-154 for bit descriptions.
Note: If a message buffer is configured for the dynamic segment and both bits of the
channel filtering field are set to 1, no frames are transmitted resp. received frames are
ignored (same function as CHA = CHB = 0)
23 Reserved 0 Reads return 0. Writes have no effect.
22-16 CYC 0-7Fh Cycle code. The 7-bit cycle code determines the cycle set used for cycle counter filtering.
15-11 Reserved 0 Reads return 0. Writes have no effect.
10-0 FID 0-7FFh Frame ID.
Frame ID of the selected message buffer. The frame ID defines the slot number for transmission /
reception of the respective message.
Note: Message buffers with frame ID = 0 are considered not valid.
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