Control Registers
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SPNU563A–March 2018
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Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin
Option (MibSPIP)
28.3.25 Parallel/Modulo Mode Control Register (SPIPMCTRL)
NOTE: Do not configure MODCLKPOLx and MMODEx bits since this device does not support
modulo mode.
NOTE: The bits of this register are used in conjunction with the SPIFMTx registers. Each byte of this
register corresponds to one of the SPIFMTx registers.
1. Byte0 (Bits 7:0) are used when SPIFMT0 register is selected by DFSEL[1:0] = 00 in the
control field of a buffer.
2. Byte1 (Bits 15:8) are used when SPIFMT1 register is selected by DFSEL[1:0] = 01 in the
control field of a buffer.
3. Byte2 (Bits 23:16) are used when SPIFMT2 register is selected by DFSEL[1:0] = 10 in the
control field of a buffer.
4. Byte3 (Bits31:24) are used when SPIFMT3 register is selected by DFSEL[1:0] = 11 in the
control field of a buffer.
Figure 28-60. Parallel/Modulo Mode Control Register (SPIPMCTRL) [offset = 6Ch]
31 30 29 28 26 25 24
Reserved MODCLKPOL3 MMODE3 PMODE3
R-0 R/WP-0 R/WP-0 R/WP-0
23 22 21 20 18 17 16
Reserved MODCLKPOL2 MMODE2 PMODE2
R-0 R/WP-0 R/WP-0 R/WP-0
15 14 13 12 10 9 8
Reserved MODCLKPOL1 MMODE1 PMODE1
R-0 R/WP-0 R/WP-0 R/WP-0
7 6 5 4 2 1 0
Reserved MODCLKPOL0 MMODE0 PMODE0
R-0 R/WP-0 R/WP-0 R/WP-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privilege mode only; -n = value after reset
Table 28-34. SPI Parallel/Modulo Mode Control Register (SPIPMCTRL) Field Descriptions
Bit Field Value Description
31-30 Reserved 0 Reads return 0. Writes have no effect.
29 MODCLKPOL3 Modulo mode SPICLK polarity. This bit determines the polarity of the SPICLK in modulo
mode only. If the MMODE3 bits are 000, this bit will be ignored.
0 Normal SPICLK in all the modes.
1 Polarity of the SPICLK will be inverted if Modulo mode is selected.
28-26 MMODE3 These bits determine whether the SPI/MibSPI operates with 1, 2, 4, 5, or 6 data lines (if
modulo option is supported by the module).
0 Normal single data line mode (default). (PMODE3 should be set to 00).
1h 2-data line mode (PMODE3 should be set to 00).
2h 3-data line mode (PMODE3 should be set to 00).
3h 4-data line mode (PMODE3 should be set to 00).
4h 5-data line mode (PMODE3 should be set to 00).
5h 6-data line mode (PMODE3 should be set to 01).
6h-7h Reserved
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