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System and Peripheral Control Registers
163
SPNU563A–March 2018
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Architecture
2.5.1.14 Clock Domain Disable Set Register (CDDISSET)
This CDDISSET register, shown in Figure 2-21 and described in Table 2-33, sets clock domains to the
disabled state.
Figure 2-21. Clock Domain Disable Set Register (CDDISSET) (offset = 40h)
31 16
Reserved
R-0
15 12 11 10 9 8
Reserved SETVCLKA4
OFF
Reserved Reserved SETVCLK3
OFF
R-0 R/WP-0 R/WP-0 R/WP-0 R/WP-0
7 6 5 4 3 2 1 0
Reserved SETRTICLK1
OFF
SETVCLKA2
OFF
SETVCLKA1
OFF
SETVCLK2
OFF
SETVCLKP
OFF
SETHCLK
OFF
SETGCLK1
OFF
R/WP-0 R/WP-0 R/WP-0 R/WP-0 R/WP-0 R/WP-0 R/WP-0 R/WP-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after reset
Table 2-33. Clock Domain Disable Set Register (CDDISSET) Field Descriptions
Bit Field Value Description
31-12 Reserved 0 Reads return 0. Writes have no effect.
11 SETVCLKA4OFF Set VCLKA4 domain.
0 Read: The VCLKA4 domain is enabled.
Write: The VCLKA4 domain is unchanged.
1 Read: The VCLKA4 domain is disabled.
Write: The VCLKA4 domain is set to the enabled state.
10-9 Reserved 0 Reads return zero or one and privilege mode writes allowed.
8 SETVCLK3OFF Set VCLK3 domain.
0 Read: The VCLK3 domain is enabled.
Write: The VCLK3 domain is unchanged.
1 Read: The VCLK3 domain is disabled.
Write: The VCLK3 domain is set to the enabled state.
7 Reserved 0-1 Reads return 0 or 1 and privilege mode writes allowed.
6 SETRTICLK1OFF Set RTICLK1 domain.
0 Read: The RTICLK1 domain is enabled.
Write: The RTICLK1 domain is unchanged.
1 Read: The RTICLK1 domain is disabled.
Write: The RTICLK1 domain is set to the enabled state.
5-4 SETVCLKA[2-1]OFF Set VCLKA[2-1] domain.
0 Read: The VCLKA[2-1] domain is enabled.
Write: The VCLKA[2-1] domain is unchanged.
1 Read: The VCLKA[2-1] domain is disabled.
Write: The VCLKA[2-1] domain is set to the enabled state.
3 SETVCLK2OFF Set VCLK2 domain.
0 Read: The VCLK2 domain is enabled.
Write: The VCLK2 domain is unchanged.
1 Read: The VCLK2 domain is disabled.
Write: The VCLK2 domain is set to the enabled state.
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