Texas Instruments TMS570LC4357 User Manual

SCI/LIN Control Registers www.ti.com
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SPNU563A–March 2018
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Serial Communication Interface (SCI)/ Local Interconnect Network (LIN)
Module
Table 29-17. SCI Clear Interrupt Register (SCICLEARINT) Field Descriptions (continued)
Bit Field Value Description
12-10 Reserved 0 Reads return 0. Writes have no effect.
9 CLR RX INT Clear receiver interrupt. This bit is effective in LIN or SCI mode. This bit disables the receiver
interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.
8 CLR TX INT Clear transmitter interrupt. This bit is effective in LIN or SCI mode. This bit disables the
transmitter interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.
7 CLR TOA3WUS INT Clear timeout after three wakeup signals interrupt. This bit is effective in LIN mode only. This bit
disables the timeout after three wakeup signals interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.
6 CLR TOAWUS INT Clear timeout after wakeup signal interrupt. This bit is effective in LIN mode only. This bit
disables the timeout after one wakeup signal interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.
5 Reserved 0 Reads return 0. Writes have no effect.
4 CLR TIMEOUT INT Clear timeout interrupt. This bit is effective in LIN mode only. This bit disables the timeout (LIN
bus idle) interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.
3-2 Reserved 0 Reads return 0. Writes have no effect.
1 CLR WAKEUP INT Clear wake-up interrupt. This bit is effective in LIN or SCI-compatible mode. This bit disables
the wakeup interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.
0 CLR BRKDT INT Clear break-detect interrupt. This bit is effective in SCI-compatible mode only. This bit disables
the break-detect interrupt when set.
0 Read: The interrupt is disabled.
Write: No effect.
1 Read: The interrupt is enabled.
Write: The interrupt is disabled.

Texas Instruments TMS570LC4357 Specifications

General

Brand	Texas Instruments
Model	TMS570LC4357
Category	Microcontrollers
Language	English