Texas Instruments TMS570LC4357

RTP Control Registers www.ti.com
2180
SPNU563A–March 2018
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
RAM Trace Port (RTP)
37.3.12 RTP Pin Control 3 Register (RTPPC3)
This register defines the state of the pins when configured in GIO mode as output pins. Once a pin is
configured in functional mode (using RTPPC0 register), changing the state of the corresponding bit in
RTPPC3 will not affect the pin's state. Figure 37-20 and Table 37-21 describe this register.
Figure 37-20. RTP Pin Control 3 Register (RTPPC3) (offset = 40h)
31 19 18 17 16
Reserved ENAOUT CLKOUT SYNCOUT
R-0 R/W-0 R/W-0 R/W-0
15 0
DATAOUT[15:0]
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 37-21. RTP Pin Control 3 Register (RTPPC3) Field Descriptions
Bit Field Value Description
31-19 Reserved 0 Reads return 0. Writes have no effect.
18 ENAOUT RTPENA output. This pin sets the output state of the RTPENA pin.
Read:
0 The pin is configured to output logic low (0) (output voltage is V
OL
or lower).
1 The pin is configured to output logic high (1) (output voltage is V
OH
or higher).
Write:
0 Set pin to logic low (0) (output voltage is V
OL
or lower).
1 Set pin to logic high (1) (output voltage is V
OH
or higher).
17 CLKOUT RTPCLK output. This pin sets the output state of the RTPCLK pin.
Read:
0 The pin is configured to output logic low (0) (output voltage is V
OL
or lower).
1 The pin is configured to output logic high (1) (output voltage is V
OH
or higher).
Write:
0 Set pin to logic low (0) (output voltage is V
OL
or lower).
1 Set pin to logic high (1) (output voltage is V
OH
or higher).
16 SYNCOUT RTPSYNC output. This pin sets the output state of the RTPSYNC pin.
Read:
0 The pin is configured to output logic low (0) (output voltage is V
OL
or lower).
1 The pin is configured to output logic high (1) (output voltage is V
OH
or higher).
Write:
0 Set pin to logic low (0) (output voltage is V
OL
or lower).
1 Set pin to logic high (1) (output voltage is V
OH
or higher).
15-0 DATAOUT[n] RTPDATA[15:0] output. These bits set the output state of the RTPDATA[15:0] pins. Each bit [n]
represents a single pin.
Read:
0 The pin is configured to output logic low (0) (output voltage is V
OL
or lower).
1 The pin is configured to output logic high (1) (output voltage is V
OH
or higher).
Write:
0 Set pin to logic low (0) (output voltage is V
OL
or lower).
1 Set pin to logic high (1) (output voltage is V
OH
or higher).