Texas Instruments TMS570LC4357 User Manual

System and Peripheral Control Registers www.ti.com
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SPNU563A–March 2018
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Architecture
2.5.3.10 Peripheral Protection Clear Register 1 (PPROTCLR1)
There is one bit for each quadrant for PS8 to PS15. The protection scheme is described in
Section 2.5.3.5. This register is shown in Figure 2-81 and described in Table 2-95.
NOTE: Only those bits that have a slave at the corresponding bit position are implemented. Writes
to unimplemented bits have no effect and reads are 0.
Figure 2-81. Peripheral Protection Clear Register 1 (PPROTCLR1) (offset = 44h)
31 0
PS[15-8]QUAD[3-0]PROTCLR
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privileged mode only; -n = value after reset
Table 2-95. Peripheral Protection Clear Register 1 (PPROTCLR1) Field Descriptions
Bit Field Value Description
31-0 PS[15-8]QUAD[3-0]
PROTCLR
Peripheral select quadrant protection clear.
0 Read: The peripheral select quadrant can be written to and read from in both user and
privileged modes.
Write: The bit is unchanged.
1 Read: The peripheral select quadrant can be written to only in privileged mode, but it can be
read in both user and privileged modes.
Write: The corresponding bit in PPROTSET1 and PPROTCLR1 registers is cleared to 0.
2.5.3.11 Peripheral Protection Clear Register 2 (PPROTCLR2)
There is one bit for each quadrant for PS16 to PS23. The protection scheme is described in
Section 2.5.3.5. This register is shown in Figure 2-82 and described in Table 2-96.
NOTE: Only those bits that have a slave at the corresponding bit position are implemented. Writes
to unimplemented bits have no effect and reads are 0.
Figure 2-82. Peripheral Protection Clear Register 2 (PPROTCLR2) (offset = 48h)
31 0
PS[23-16]QUAD[3-0]PROTCLR
R/WP-0
LEGEND: R/W = Read/Write; WP = Write in privileged mode only; -n = value after reset
Table 2-96. Peripheral Protection Clear Register 2 (PPROTCLR2) Field Descriptions
Bit Field Value Description
31-0 PS[23-16]QUAD[3-0]
PROTCLR
Peripheral select quadrant protection clear.
0 Read: The peripheral select quadrant can be written to and read from in both user and
privileged modes.
Write: The bit is unchanged.
1 Read: The peripheral select quadrant can be written to only in privileged mode, but it can be
read in both user and privileged modes.
Write: The corresponding bit in PPROTSET2 and PPROTCLR2 registers is cleared to 0.

Texas Instruments TMS570LC4357 Specifications

General

Brand	Texas Instruments
Model	TMS570LC4357
Category	Microcontrollers
Language	English