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ADC Registers
923
SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.3.34 ADC Calibration and Error Offset Correction Register (ADCALR)
ADC Calibration and Error Offset Correction Register (ADCALR) is shown in Figure 22-56 and Figure 22-
57, and described in Table 22-40. As shown, the format of the ADCALR is different based on whether the
ADC module is configured to be a 12-bit or a 10-bit ADC module.
Figure 22-56. 12-bit ADC Calibration and Error Offset Correction Register (ADCALR) [offset = 84h]
31 12 11 0
Reserved ADCALR
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Figure 22-57. 10-bit ADC Calibration and Error Offset Correction Register (ADCALR) [offset = 84h]
31 10 9 0
Reserved ADCALR
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-40. ADC Calibration and Error Offset Correction Register (ADCALR) Field Descriptions
Field Value Description
Reserved 0 Reads return 0. Writes have no effect.
ADCALR ADC Calibration Result and Offset Error Correction Value.
The ADC module writes the results of the calibration conversions to this register. The application is
required to use these conversion results and determine the ADC offset error. The application can then
compute the correction for the offset error and this correction value needs to be written back to the
ADCALR register in the 2's complement form.
During normal conversion (when calibration is disabled), the ADCALR register contents are automatically
added to each digital output from the ADC core before it is stored in the ADC results memory. For more
details on error calibration, refer to Section 22.2.6.1.
22.3.35 ADC State Machine Status Register (ADSMSTATE)
Figure 22-58 and Table 22-41 describe the ADSMSTATE register.
Figure 22-58. ADC State Machine Status Register (ADSMSTATE) [offset = 88h]
31 4 3 0
Reserved SMSTATE
R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 22-41. ADC State Machine Status Register (ADSMSTATE) Field Descriptions
Bit Field Value Description
31-4 Reserved 0 Reads return 0. Writes have no effect.
3-0 SMSTATE ADC State Machine Current State.
These bits reflect the current state of the state machine and are reserved for use by TI for debug
purposes.