Texas Instruments TMS570LC4357 User Manual

System and Peripheral Control Registers www.ti.com
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SPNU563A–March 2018
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Architecture
2.5.1.7 SYS Pin Control Register 7 (SYSPC7)
The SYSPC7 register, shown in Figure 2-14 and described in Table 2-25, controls the open drain function
of the ECLK pin.
Figure 2-14. SYS Pin Control Register 7 (SYSPC7) (offset = 18h)
31 16
Reserved
R-0
15 1 0
Reserved ECPCLKODE
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-25. SYS Pin Control Register 7 (SYSPC7) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reads return 0. Writes have no effect.
0 ECPCLKODE ECLK open drain enable. This bit is only active when ECLK is configured to be in GIO mode.
0 The ECLK pin is configured in push/pull (normal GIO) mode.
1 The ECLK pin is configured in open drain mode. The ECPCLKDOUT bit in the SYSPC4 register
controls the state of the ECLK output buffer:
ECPCLKDOUT = 0: The ECLK output buffer is driven low.
ECPCLKDOUT = 1: The ECLK output buffer is tristated.
Note: The ECLK pin is placed into GIO mode by clearing the ECPCLKFUN bit to 0 in the
SYSPC1 register.
2.5.1.8 SYS Pin Control Register 8 (SYSPC8)
The SYSPC8 register, shown in Figure 2-15 and described in Table 2-26, controls the pull enable function
of the ECLK pin when it is configured as an input in GIO mode.
Figure 2-15. SYS Pin Control Register 8 (SYSPC8) (offset = 1Ch)
31 16
Reserved
R-0
15 1 0
Reserved ECPCLKPUE
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; D = Device Specific; -n = value after reset
Table 2-26. SYS Pin Control Register 8 (SYSPC8) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reads return 0. Writes have no effect.
0 ECPCLKPUE ECLK pull enable. Writes to this bit will only take effect when the ECLK pin is configured as an
input in GIO mode.
0 ECLK pull enable is active.
1 ECLK pull enable is inactive.
Note: The pull direction (up/down) is selected by the ECPCLKPS bit in the SYSPC9
register.
Note: The ECLK pin is placed into GIO mode by clearing the ECPCLKFUN bit to 0 in the
SYSPC1 register. The ECLK pin is placed in input mode by clearing the ECPCLKDIR bit
to 0 in the SYSPC2 register.

Texas Instruments TMS570LC4357 Specifications

General

Brand	Texas Instruments
Model	TMS570LC4357
Category	Microcontrollers
Language	English