MBR =
0.9x VCLK
maxbaudrate
SCI/LIN Control Registers
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1714
SPNU563A–March 2018
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Serial Communication Interface (SCI)/ Local Interconnect Network (LIN)
Module
29.7.30 Maximum Baud Rate Selection Register (MBRS)
Figure 29-59 and Table 29-47 illustrate this register.
Figure 29-59. Maximum Baud Rate Selection Register (MBRS) (offset = 7Ch)
31 16
Reserved
R-0
15 13 12 0
Reserved MBR
R-0 R/WL-DACh
LEGEND: R/W = Read/Write; R = Read only; WL = Write in LIN mode only; -n = value after reset
Table 29-47. Maximum Baud Rate Selection Register (MBRS) Field Descriptions
Bit Field Value Description
31-13 Reserved 0 Reads return 0. Writes have no effect.
12-0 MBR 0-1FFFh Maximum baud rate prescaler. This bit is effective in LIN mode only. This 13-bit prescaler is
used during the synchronization phase (see Section 29.3.1.5.2) of a slave module if the ADAPT
bit is set. In this way, a SCI/LIN slave using an automatic or select bit rate modes detects any
LIN bus legal rate automatically.
The MBR value should be programmed to allow a maximum baud rate that is not more than
10% above the expected operating baud rate in the LIN network. Otherwise, a 00h data byte
could mistakenly be detected as a sync break.
The default value for a 70-MHz VCLK is DACh.
This MBR prescaler is used by the wake-up and idle time counters for a constant expiration
time relative to a 20-kHz rate.
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