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RTI Control Registers
619
SPNU563A–March 2018
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Real-Time Interrupt (RTI) Module
17.3.31 RTI Watchdog Key Register (RTIWDKEY)
This register must be written with the correct written key values to serve the watchdog. This register is
shown in Figure 17-42 and described in Table 17-32.
NOTE: It has to be taken into account that the write to the RTIWDKEY register takes 3 VCLK cycles.
Figure 17-42. RTI Watchdog Key Register (RTIDWDKEY) [offset = 9Ch]
31 16
Reserved
R-0
15 0
WDKEY
R/WP-A35Ch
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after reset
Table 17-32. RTI Watchdog Key Register (RTIDWDKEY) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reads return 0 and writes have no effect.
15-0 WDKEY 0-FFFFh Watchdog key. These bits provide the key sequence location.
Reads returns the current WDKEY value.
A write of E51Ah followed by A35Ch in two separate write operations defines the key sequence
and reloads the DWD. Writing any other value causes a reset or NMI, as shown in Table 17-33.
Writing any other value will cause the WDKEY to reset to A35Ch.
Table 17-33. Example of a WDKEY Sequence
Step Value Written to WDKEY Result
1 A35Ch No action
2 A35Ch No action
3 E51Ah WDKEY is enabled for reset or NMI by next A35Ch.
4 E51Ah WDKEY is enabled for reset or NMI by next A35Ch.
5 E51Ah WDKEY is enabled for reset or NMI by next A35Ch.
6 A35Ch Watchdog is reset.
7 A35Ch No action
8 E51Ah WDKEY is enabled for reset or NMI by next A35Ch.
9 A35Ch Watchdog is reset.
10 E51Ah WDKEY is enabled for reset or NMI by next A35Ch.
11 2345h System reset or NMI; incorrect value written to WDKEY.
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