Texas Instruments TMS570LC4357 - Page 75

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SPNU563A–March 2018
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List of Tables
4-11. Error Transaction Signature Register (ERR_TRANS_SIGNATURE) Field Descriptions........................ 276
4-12. Error Transaction Type Register (ERR_TRANS_TYPE) Field Descriptions...................................... 276
4-13. Error User Parity Register (ERR_USER_PARITY) Field Descriptions ............................................ 277
4-14. Slave Error Unexpected Master ID Register (SERR_UNEXPECTED_MID) Field Descriptions ............... 277
4-15. Slave Error Address Decode Register (SERR_ADDR_DECODED) Field Descriptions......................... 278
4-16. Slave Error User Parity Register (SERR_USER_PARITYID) Field Descriptions ................................ 278
5-1. PMM Registers............................................................................................................ 285
5-2. Logic Power Domain Control Register (LOGICPDPWRCTRL0) Field Descriptions ............................. 286
5-3. Logic Power Domain Control Register (LOGICPDPWRCTRL1) Field Descriptions ............................. 287
5-4. Power Domain Clock Disable Register (PDCLKDISREG) Field Descriptions .................................... 288
5-5. Power Domain Clock Disable Set Register (PDCLKDISSETREG) Field Descriptions.......................... 289
5-6. Power Domain Clock Disable Clear Register (PDCLKDISCLRREG) Field Descriptions ....................... 290
5-7. Logic Power Domain PD2 Power Status Register (LOGICPDPWRSTAT0) Field Descriptions................ 291
5-8. Logic Power Domain PD3 Power Status Register (LOGICPDPWRSTAT1) Field Descriptions................ 292
5-9. Logic Power Domain PD4 Power Status Register (LOGICPDPWRSTAT2) Field Descriptions................ 293
5-10. Logic Power Domain PD5 Power Status Register (LOGICPDPWRSTAT3) Field Descriptions................ 294
5-11. Logic Power Domain PD6 Power Status Register (LOGICPDPWRSTAT4) Field Descriptions................ 295
5-12. Global Control Register 1 (GLOBALCTRL1) Field Descriptions.................................................... 296
5-13. Global Status Register (GLOBALSTAT) Field Descriptions......................................................... 297
5-14. PSCON Diagnostic Compare Key Register (PRCKEYREG) Field Descriptions ................................. 297
5-15. LogicPD PSCON Diagnostic Compare Status Register 1 (LPDDCSTAT1) Field Descriptions ................ 298
5-16. LogicPD PSCON Diagnostic Compare Status Register 2 (LPDDCSTAT2) Field Descriptions ................ 299
5-17. Isolation Diagnostic Status Register (ISODIAGSTAT) Field Descriptions ........................................ 300
6-1. Multiplexing for Outputs on 337ZWT Package........................................................................ 304
6-2. Input Multiplexing and Control on 337ZWT Package ................................................................ 309
6-3. Special Multiplexed Controls ............................................................................................ 312
6-4. ADC1 Trigger Event Selection .......................................................................................... 314
6-5. ADC2 Trigger Event Selection .......................................................................................... 315
6-6. Controls for ePWMx Inputs.............................................................................................. 321
6-7. Controls for eQEPx_ERROR Connection to ePWMx nTZ4 Inputs................................................. 322
6-8. Controls for eCAPx Inputs............................................................................................... 322
6-9. Controls for eQEPx Inputs............................................................................................... 323
6-10. GIO DMA Request Select Bit Mapping ................................................................................ 325
6-11. Temperature Sensor Selection.......................................................................................... 326
6-12. IOMM Registers........................................................................................................... 328
6-13. Revision Register Field Descriptions................................................................................... 328
6-14. Boot Mode Register Field Descriptions ................................................................................ 329
6-15. Kicker Register 0 Field Descriptions ................................................................................... 330
6-16. Kicker Register 1 Field Descriptions ................................................................................... 330
6-17. Error Raw Status / Set Register Field Descriptions .................................................................. 331
6-18. Error Signaling Enabled Status / Clear Register Field Descriptions ............................................... 332
6-19. Error Enable Register Field Descriptions.............................................................................. 333
6-20. Interrupt Enable Clear Register Field Descriptions................................................................... 334
6-21. Fault Address Register Field Descriptions ............................................................................ 334
6-22. Fault Status Register Field Descriptions............................................................................... 335
6-23. FAULT_CLEAR_REG: Fault Clear Register Field Descriptions.................................................... 336
6-24. Pin Multiplexing Control Registers Field Descriptions ............................................................... 336
6-25. Pin Multiplexing Control Registers Field Descriptions ............................................................... 337
6-26. Pin Multiplexing Control Registers Field Descriptions ............................................................... 337