Texas Instruments TMS570LC4357 - Page 76

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SPNU563A–March 2018
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List of Tables
7-1. ECC Encoding for BE32 Devices....................................................................................... 342
7-2. Syndrome Table .......................................................................................................... 343
7-3. Alternate Syndrome Table............................................................................................... 344
7-4. TI OTP Bank 0 Sector Information Field Descriptions ............................................................... 346
7-5. TI OTP Sector Information Address.................................................................................... 346
7-6. TI OTP Bank 0 Package and Memory Size Information Field Descriptions ...................................... 347
7-7. TI OTP Bank 0 LPO Trim and Max HCLK Information Field Descriptions ........................................ 347
7-8. TI OTP Bank 0 Temperature Sensor Calibration Information Field Descriptions ................................ 349
7-9. DIAGMODE Encoding.................................................................................................... 350
7-10. Diagnostic Mode Summary.............................................................................................. 352
7-11. Errors in L2FMC .......................................................................................................... 354
7-12. Flash Control Registers.................................................................................................. 355
7-13. Flash Read Control Register (FRDCNTL) Field Descriptions....................................................... 356
7-14. Read Margin Control Register (FSPRD) Field Descriptions ........................................................ 357
7-15. EEPROM Error Correction Control Register (EE_FEDACCTRL1) Field Descriptions .......................... 358
7-16. Flash Port A Error and Status Register (FEDAC_PASTATUS) Field Descriptions .............................. 359
7-17. Flash Port B Error and Status Register (FEDAC_PBSTATUS) Field Descriptions .............................. 360
7-18. Flash Global Error and Status Register (FEDAC_GBLSTATUS) Field Descriptions ............................ 361
7-19. Flash Error Detection and Correction Sector Disable Register (FEDACSDIS) Field Descriptions ............ 362
7-20. Primary Address Tag Register (FPRIM_ADD)_TAG Field Descriptions .......................................... 363
7-21. Duplicate Address Tag Register (FDUP_ADD)_TAG Field Descriptions.......................................... 363
7-22. Flash Bank Protection Register (FBPROT) Field Descriptions ..................................................... 364
7-23. Flash Bank Sector Enable Register (FBSE) Field Descriptions .................................................... 364
7-24. Flash Bank Busy Register (FBBUSY) Field Descriptions ........................................................... 365
7-25. Flash Bank Access Control Register (FBAC) Field Descriptions................................................... 365
7-26. Flash Bank Power Mode Register (FBPWRMODE) Field Descriptions ........................................... 366
7-27. Flash Bank/Pump Ready Register (FBPRDY) Register Description............................................... 367
7-28. Flash Pump Access Control Register 1 (FPAC1) Field Descriptions .............................................. 368
7-29. Flash Module Access Control Register (FMAC) Field Descriptions................................................ 369
7-30. Flash Module Status Register (FMSTAT) Field Descriptions ....................................................... 370
7-31. EEPROM Emulation Data MSW Register (FEMU_DMSW) Field Descriptions .................................. 372
7-32. EEPROM Emulation Data LSW Register (FEMU_DLSW) Field Descriptions.................................... 372
7-33. EEPROM Emulation ECC Register (FEMU_ECC) Field Descriptions............................................. 373
7-34. Flash Lock Register (FLOCK) Field Descriptions .................................................................... 373
7-35. Diagnostic Control Register (FDIAGCTRL) Field Descriptions ..................................................... 374
7-36. Raw Address Register (FRAW_ADDR) Field Descriptions ......................................................... 375
7-37. Parity Override Register (FPAR_OVR) Field Descriptions.......................................................... 376
7-38. Reset Configuration Valid Register (RCR_VALID) Field Descriptions............................................. 377
7-39. Crossbar Access Time Threshold Register (ACC_THRESHOLD) Field Descriptions........................... 377
7-40. Flash Error Detection and Correction Sector Disable Register 2 (FEDACSDIS2) Field Descriptions......... 378
7-41. Lower Word of Reset Configuration Read Register (RCR_VALUE0) Field Descriptions ....................... 379
7-42. Upper Word of Reset Configuration Read Register (RCR_VALUE1) Field Descriptions ....................... 379
7-43. FSM Register Write Enable Register (FSM_WR_ENA) Field Descriptions....................................... 380
7-44. EPROM Emulation Configuration Register (EEPROM_CONFIG) Field Descriptions ........................... 380
7-45. FSM Sector Register 1 (FSM_SECTOR1) Field Descriptions...................................................... 381
7-46. FSM Sector Register 2 (FSM_SECTOR2) Field Descriptions...................................................... 381
7-47. Flash Bank Configuration Register (FCFG_BANK) Field Descriptions............................................ 382
7-48. POM Control Registers .................................................................................................. 383
7-49. POM Global Control Register (POMGLBCTRL) Field Descriptions................................................ 383