ADC Registers
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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
22.3.44 ADC ADEVT Pin Output Value Control Register (ADEVTOUT)
ADC ADEVT Pin Output Value Control Register (ADEVTOUT) is shown in Figure 22-73 and described in
Table 22-50.
Figure 22-73. ADC ADEVT Pin Output Value Control Register (ADEVTOUT) [offset = 100h]
31 1 0
Reserved ADEVT_OUT
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-50. ADC ADEVT Pin Output Value Control Register (ADEVTOUT) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reads return 0. Writes have no effect.
0 ADEVT_OUT ADEVT Pin Output Value. This bit determines the logic level to be output to the ADEVT pin when
the pin is configured to be an output pin.
Any operating mode read/write:
0 Output logic LOW on the ADEVT pin.
1 Output logic HIGH on the ADEVT pin.
22.3.45 ADC ADEVT Pin Input Value Register (ADEVTIN)
ADC ADEVT Pin Input Value Register (ADEVTIN) is shown in Figure 22-74 and described in Table 22-51.
Figure 22-74. ADC ADEVT Pin Input Value Register (ADEVTIN) [offset = 104h]
31 1 0
Reserved ADEVT_IN
R-0 R-U
LEGEND: R = Read only; -n = value after reset; U = value after reset is unknown
Table 22-51. ADC ADEVT Pin Input Value Register (ADEVTIN) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reads return 0. Writes have no effect.
0 ADEVT_IN ADEVT Pin Input Value. This is a read-only bit that reflects the logic level on the ADEVT pin.
Any operating mode read:
0 Logic LOW present on the ADEVT pin.
1 Logic HIGH present on the ADEVT pin.
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