SCI/LIN Control Registers
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SPNU563A–March 2018
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Serial Communication Interface (SCI)/ Local Interconnect Network (LIN)
Module
29.7.17 SCI Pin I/O Control Register 3 (SCIPIO3)
Figure 29-46 and Table 29-34 illustrate this register.
Figure 29-46. SCI Pin I/O Control Register 3 (SCIPIO3) (offset = 48h)
31 8
Reserved
R-0
7 3 2 1 0
Reserved TX OUT RX OUT Reserved
R-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 29-34. SCI Pin I/O Control Register 3 (SCIPIO3) Field Descriptions
Bit Field Value Description
31-3 Reserved 0 Reads return 0. Writes have no effect.
2 TX OUT Transmit pin out. This bit is effective in LIN or SCI mode. This pin specifies the logic to be output on pin
LINTX if the following conditions are met:
• TX FUNC = 0 (LINTX pin is a general-purpose I/O.)
• TX DIR = 1 (LINTX pin is a general-purpose output.)
See Table 29-31 for an explanation of this bit’s effect in combination with other bits.
0 The output on the LINTX is at logic low (0).
1 The output on the LINTX pin is at logic high (1). (Output voltage is V
OH
or higher if TXPDR = 0 and
output is in high impedance state if TXPDR = 1.)
1 RX OUT Receive pin out. This bit is effective in LIN or SCI mode. This bit specifies the logic to be output on pin
LINRX if the following conditions are met:
• RX FUNC = 0 (LINRX pin is a general-purpose I/O.)
• RX DIR = 1 (LINRX pin is a general-purpose output.)
See Table 29-32 for an explanation of this bit’s effect in combination with the other bits.
0 The output on the LINRX pin is at logic low (0).
1 The output on the LINRX pin is at logic high (1). (Output voltage is V
OH
or higher if RXPDR = 0, and
output is in high impedance state if RXPDR = 1.)
0 Reserved 0 Writes have no effect.
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