Texas Instruments TMS570LC4357 - Page 59

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59
SPNU563A–March 2018
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List of Figures
27-26. Parity Error Code Register (DCAN PERR) [offset = 1Ch] ......................................................... 1465
27-27. Core Release Register (DCAN REL) [offset = 20h] ................................................................ 1465
27-28. ECC Diagnostic Register (DCAN ECCDIAG) [offset = 24h]....................................................... 1466
27-29. ECC Diagnostic Status Register (DCAN ECCDIAG STAT) [offset = 28h]....................................... 1466
27-30. ECC Control and Status Register (DCAN ECC CS) [offset = 2Ch]............................................... 1467
27-31. ECC Single-Bit Error Code Register (DCAN ECC SERR) [offset = 30h] ........................................ 1468
27-32. Auto-Bus-On Time Register (DCAN ABOTR) [offset = 80h]....................................................... 1469
27-33. Transmission Request X Register (DCAN TXRQ X) [offset = 84h]............................................... 1469
27-34. Transmission Request 12 Register (DCAN TXRQ12) [offset = 88h] ............................................. 1470
27-35. Transmission Request 34 Register (DCAN TXRQ34) [offset = 8Ch]............................................. 1470
27-36. Transmission Request 56 Register (DCAN TXRQ56) [offset = 90h] ............................................. 1470
27-37. Transmission Request 78 Register (DCAN TXRQ78) [offset = 94h] ............................................. 1470
27-38. New Data X Register (DCAN NWDAT X) [offset = 98h] ........................................................... 1471
27-39. New Data 12 Register (DCAN NWDAT12) [offset = 9Ch] ......................................................... 1472
27-40. New Data 34 Register (DCAN NWDAT34) [offset = A0h] ......................................................... 1472
27-41. New Data 56 Register (DCAN NWDAT56) [offset = A4h] ......................................................... 1472
27-42. New Data 78 Register (DCAN NWDAT78) [offset = A8h] ......................................................... 1472
27-43. Interrupt Pending X Register (DCAN INTPND X) [offset = ACh] ................................................. 1473
27-44. Interrupt Pending 12 Register (DCAN INTPND12) [offset = B0h] ................................................ 1474
27-45. Interrupt Pending 34 Register (DCAN INTPND34) [offset = B4h] ................................................ 1474
27-46. Interrupt Pending 56 Register (DCAN INTPND56) [offset = B8h] ................................................ 1474
27-47. Interrupt Pending 78 Register (DCAN INTPND78) [offset = BCh]................................................ 1474
27-48. Message Valid X Register (DCAN MSGVAL X) [offset = C0h].................................................... 1475
27-49. Message Valid 12 Register (DCAN MSGVAL12) [offset = C4h] .................................................. 1476
27-50. Message Valid 34 Register (DCAN MSGVAL34) [offset = C8h] .................................................. 1476
27-51. Message Valid 56 Register (DCAN MSGVAL56) [offset = CCh].................................................. 1476
27-52. Message Valid 78 Register (DCAN MSGVAL78) [offset = D0h] .................................................. 1476
27-53. Interrupt Multiplexer 12 Register (DCAN INTMUX12) [offset = D8h]............................................. 1477
27-54. Interrupt Multiplexer 34 Register (DCAN INTMUX34) [offset = DCh] ............................................ 1477
27-55. Interrupt Multiplexer 56 Register (DCAN INTMUX56) [offset = E0h]............................................. 1477
27-56. Interrupt Multiplexer 78 Register (DCAN INTMUX78) [offset = E4h]............................................. 1477
27-57. IF1 Command Registers (DCAN IF1CMD) [offset = 100h] ........................................................ 1478
27-58. IF2 Command Registers (DCAN IF2CMD) [offset = 120h] ........................................................ 1478
27-59. IF1 Mask Register (DCAN IF1MSK) [offset = 104h]................................................................ 1481
27-60. IF2 Mask Register (DCAN IF2MSK) [offset = 124h]................................................................ 1481
27-61. IF1 Arbitration Register (DCAN IF1ARB) [offset = 108h] .......................................................... 1482
27-62. IF2 Arbitration Register (DCAN IF2ARB) [offset = 128h] .......................................................... 1482
27-63. IF1 Message Control Register (DCAN IF1MCTL) [offset = 10Ch]................................................ 1484
27-64. IF2 Message Control Register (DCAN IF2MCTL) [offset = 12Ch]................................................ 1484
27-65. IF1 Data A Register (DCAN IF1DATA) [offset = 110h]............................................................. 1486
27-66. IF1 Data B Register (DCAN IF1DATB) [offset = 114h]............................................................. 1486
27-67. IF2 Data A Register (DCAN IF2DATA) [offset = 130h]............................................................. 1486
27-68. IF2 Data B Register (DCAN IF2DATB) [offset = 134h]............................................................. 1486
27-69. IF3 Observation Register (DCAN IF3OBS) [offset = 140h]........................................................ 1487
27-70. IF3 Mask Register (DCAN IF3MSK) [offset = 144h]................................................................ 1489
27-71. IF3 Arbitration Register (DCAN IF3ARB) [offset = 148h] .......................................................... 1490
27-72. IF3 Message Control Register (DCAN IF3MCTL) [offset = 14Ch]................................................ 1491
27-73. IF3 Data A Register (DCAN IF3DATA) [offset = 150h]............................................................. 1492
27-74. IF3 Data B Register (DCAN IF3DATB) [offset = 154h]............................................................. 1492