TC1796
System and Peripheral Units (Vol. 1 and 2)
User’s Manual V2.0, 2007-07
6-4 Figure 6-2 is updated.
6-7, 6-8 DBCU_ID and PBCU_ID are added.
6-9 Bit description of LEC is updated.
6-16, 6-17 LFI_ID is added.
6-21 Section 6.4.3 is updated.
6-22 Figure 6-7 is updated.
6-30 BCU breakpoint Trigger Combination Logic in Figure 6-12 is updated.
6-34, 6-36 SBCU_ID and RBCU_ID are added.
7-16 DFLASH addresses in Table 7-7 are updated
7-40, 7-41,
7-42
FLASH_ID and PMU_ID are added.
7-43 Bit description of FABUSY is updated.
7-58 Footnote is added to FLASH_CON register.
8-7 Section 8.5.2 is updated.
8-10, 8-11 DMU_ID is added.
9-5, 9-7, 9-9 Short name for SBRAM and SPRAM is updated.
11-52, 11-54 PCP_ID is added.
11-59 PCP_ES bit 5 is updated.
11-74 Counter Reload Value (COPY) in Table 11-13 is updated.
11-78 Figure 11-14 is updated.
11-103 Syntax description of ST.PI is updated.
12-9 Figure 12-5 is updated.
12-10 Figure 12-6 is updated.
12-16 Section 12.1.4.5 is updated.
12-29 Figure 12-20 is updated.
12-30 Figure 12-21 is updated.
12-34 The pattern detection description in Section 12.1.9 is updated.
12-42, 12-43,
12-45
DMA_ID is added.
12-52, 12-53 Bit descriptions of CH0x/CH1x and HTRE0x/HTRE1x are updated.
TC1796 User’s Manual
Volume 1 (of 2) System Units & Volume 2 (of 2) Peripheral Units
Revision History: V2.0, 2007-07
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