ADC Registers
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SPNU563A–March 2018
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Analog To Digital Converter (ADC) Module
Table 22-6. ADC Registers (continued)
Offset Acronym Register Description Section
F8h ADG2EMUBUFFER ADC Group2 Results Emulation FIFO Register Section 22.3.42
FCh ADEVTDIR ADC ADEVT Pin Direction Control Register Section 22.3.43
100h ADEVTOUT ADC ADEVT Pin Output Value Control Register Section 22.3.44
104h ADEVTIN ADC ADEVT Pin Input Value Register Section 22.3.45
108h ADEVTSET ADC ADEVT Pin Set Register Section 22.3.46
10Ch ADEVTCLR ADC ADEVT Pin Clear Register Section 22.3.47
110h ADEVTPDR ADC ADEVT Pin Open Drain Enable Register Section 22.3.48
114h ADEVTPDIS ADC ADEVT Pin Pull Control Disable Register Section 22.3.49
118h ADEVTPSEL ADC ADEVT Pin Pull Control Select Register Section 22.3.50
11Ch ADEVSAMPDISEN ADC Event Group Sample Cap Discharge Control Register Section 22.3.51
120h ADG1SAMPDISEN ADC Group1 Sample Cap Discharge Control Register Section 22.3.52
124h ADG2SAMPDISEN ADC Group2 Sample Cap Discharge Control Register Section 22.3.53
128h-138h ADMAGINTxCR ADC Magnitude Compare Interrupt Control Register Section 22.3.54
12Ch-13Ch ADMAGxMASK ADC Magnitude Compare Mask Register Section 22.3.55
158h ADMAGINTENASET ADC Magnitude Compare Interrupt Enable Set Register Section 22.3.56
15Ch ADMAGINTENACLR ADC Magnitude Compare Interrupt Enable Clear Register Section 22.3.57
160h ADMAGINTFLG ADC Magnitude Compare Interrupt Flag Register Section 22.3.58
164h ADMAGINTOFF ADC Magnitude Compare Interrupt Offset Register Section 22.3.59
168h ADEVFIFORESETCR ADC Event Group FIFO Reset Control Register Section 22.3.60
16Ch ADG1FIFORESETCR ADC Group1 FIFO Reset Control Register Section 22.3.61
170h ADG2FIFORESETCR ADC Group2 FIFO Reset Control Register Section 22.3.62
174h ADEVRAMWRADDR ADC Event Group RAM Write Address Register Section 22.3.63
178h ADG1RAMWRADDR ADC Group1 RAM Write Address Register Section 22.3.64
17Ch ADG2RAMWRADDR ADC Group2 RAM Write Address Register Section 22.3.65
180h ADPARCR ADC Parity Control Register Section 22.3.66
184h ADPARADDR ADC Parity Error Address Register Section 22.3.67
188h ADPWRUPDLYCTRL ADC Power-Up Delay Control Register Section 22.3.68
190h ADEVCHNSELMODECTRL ADC Event Group Channel Selection Mode Control Register Section 22.3.69
194h ADG1CHNSELMODECTRL ADC Group1 Channel Selection Mode Control Register Section 22.3.70
198h ADG2CHNSELMODECTRL ADC Group2 Channel Selection Mode Control Register Section 22.3.71
19Ch ADEVCURRCOUNT ADC Event Group Current Count Register Section 22.3.72
1A0h ADEVMAXCOUNT ADC Event Group Max Count Register Section 22.3.73
1A4h ADG1CURRCOUNT ADC Group1 Current Count Register Section 22.3.74
1A8h ADG1MAXCOUNT ADC Group1 Max Count Register Section 22.3.75
1ACh ADG2CURRCOUNT ADC Group2 Current Count Register Section 22.3.76
1B0h ADG2MAXCOUNT ADC Group2 Max Count Register Section 22.3.77